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authorBipin Ravi <bipin.ravi@arm.com>2023-02-06 03:24:08 +0100
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2023-02-06 03:24:08 +0100
commit2f9aaf2d64d567366dfe2c63551ece1d668908b6 (patch)
treece4460276ab7fabf8bafb7cc937d02b4fa95401a
parentf6e74f653335482c548afa4edc0eb7bd0fcae820 (diff)
parent209b8ccd772d3b94b30b731bd85da1c3ecd0ecdb (diff)
downloadarm-trusted-firmware-2f9aaf2d64d567366dfe2c63551ece1d668908b6.tar.gz
Merge "fix(cpus): workaround for Cortex-X2 erratum 2282622" into lts-v2.8
-rw-r--r--docs/design/cpu-specific-build-macros.rst42
-rw-r--r--lib/cpus/aarch64/cortex_x2.S66
-rw-r--r--lib/cpus/cpu-ops.mk11
3 files changed, 84 insertions, 35 deletions
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst
index 7480a84f9..8a8445db4 100644
--- a/docs/design/cpu-specific-build-macros.rst
+++ b/docs/design/cpu-specific-build-macros.rst
@@ -591,29 +591,33 @@ For Cortex-X2, the following errata build flags are defined :
- ``ERRATA_X2_2083908``: This applies errata 2083908 workaround to Cortex-X2
CPU. This needs to be enabled for revision r2p0 of the CPU, it is still open.
-- ``ERRATA_X2_2017096``: This applies errata 2017096 workaround to
- Cortex-X2 CPU. This needs to be enabled only for revisions r0p0, r1p0 and
- r2p0 of the CPU, it is fixed in r2p1.
+- ``ERRATA_X2_2017096``: This applies errata 2017096 workaround to Cortex-X2
+ CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
+ CPU, it is fixed in r2p1.
-- ``ERRATA_X2_2081180``: This applies errata 2081180 workaround to
- Cortex-X2 CPU. This needs to be enabled only for revisions r0p0, r1p0 and
- r2p0 of the CPU, it is fixed in r2p1.
+- ``ERRATA_X2_2081180``: This applies errata 2081180 workaround to Cortex-X2
+ CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
+ CPU, it is fixed in r2p1.
-- ``ERRATA_X2_2216384``: This applies errata 2216384 workaround to
- Cortex-X2 CPU. This needs to be enabled only for revisions r0p0, r1p0 and
- r2p0 of the CPU, it is fixed in r2p1.
+- ``ERRATA_X2_2216384``: This applies errata 2216384 workaround to Cortex-X2
+ CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
+ CPU, it is fixed in r2p1.
-- ``ERRATA_X2_2147715``: This applies errata 2147715 workaround to
- Cortex-X2 CPU. This needs to be enabled only for revision r2p0 of the CPU,
- it is fixed in r2p1.
+- ``ERRATA_X2_2147715``: This applies errata 2147715 workaround to Cortex-X2
+ CPU. This needs to be enabled only for revision r2p0 of the CPU, it is fixed
+ in r2p1.
-- ``ERRATA_X2_2371105``: This applies errata 2371105 workaround to
- Cortex-X2 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
- of the CPU and is fixed in r2p1.
+- ``ERRATA_X2_2282622``: This applies errata 2282622 workaround to Cortex-X2
+ CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
+ CPU and is still open.
+
+- ``ERRATA_X2_2371105``: This applies errata 2371105 workaround to Cortex-X2
+ CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 of the CPU
+ and is fixed in r2p1.
-- ``ERRATA_X2_2768515``: This applies errata 2768515 workaround to
- Cortex-X2 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0
- and r2p1 of the CPU and is still open.
+- ``ERRATA_X2_2768515``: This applies errata 2768515 workaround to Cortex-X2
+ CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
+ CPU and is still open.
For Cortex-X3, the following errata build flags are defined :
@@ -754,7 +758,7 @@ GIC Errata Workarounds
--------------
-*Copyright (c) 2014-2022, Arm Limited and Contributors. All rights reserved.*
+*Copyright (c) 2014-2023, Arm Limited and Contributors. All rights reserved.*
.. _CVE-2017-5715: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2017-5715
.. _CVE-2018-3639: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2018-3639
diff --git a/lib/cpus/aarch64/cortex_x2.S b/lib/cpus/aarch64/cortex_x2.S
index f56d50a34..497bd52e4 100644
--- a/lib/cpus/aarch64/cortex_x2.S
+++ b/lib/cpus/aarch64/cortex_x2.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021-2022, Arm Limited. All rights reserved.
+ * Copyright (c) 2021-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -267,13 +267,43 @@ func check_errata_2147715
b cpu_rev_var_range
endfunc check_errata_2147715
-/* -------------------------------------------------------
- * Errata Workaround for Cortex-X2 Erratum 2371105.
- * This applies to revisions <= r2p0 and is fixed in r2p1.
- * x0: variant[4:7] and revision[0:3] of current cpu.
- * Shall clobber: x0-x17
- * -------------------------------------------------------
- */
+ /* ---------------------------------------------------------------
+ * Errata Workaround for Cortex-X2 Erratum 2282622.
+ * This applies to revision r0p0, r1p0, r2p0 and r2p1.
+ * It is still open.
+ * Inputs:
+ * x0: variant[4:7] and revision[0:3] of current cpu.
+ * Shall clobber: x0, x1, x17
+ * ---------------------------------------------------------------
+ */
+func errata_x2_2282622_wa
+ /* Compare x0 against revision r2p1 */
+ mov x17, x30
+ bl check_errata_2282622
+ cbz x0, 1f
+
+ /* Apply the workaround */
+ mrs x1, CORTEX_X2_CPUACTLR2_EL1
+ orr x1, x1, #BIT(0)
+ msr CORTEX_X2_CPUACTLR2_EL1, x1
+
+1:
+ ret x17
+endfunc errata_x2_2282622_wa
+
+func check_errata_2282622
+ /* Applies to r0p0, r1p0, r2p0 and r2p1 */
+ mov x1, #0x21
+ b cpu_rev_var_ls
+endfunc check_errata_2282622
+
+ /* -------------------------------------------------------
+ * Errata Workaround for Cortex-X2 Erratum 2371105.
+ * This applies to revisions <= r2p0 and is fixed in r2p1.
+ * x0: variant[4:7] and revision[0:3] of current cpu.
+ * Shall clobber: x0-x17
+ * -------------------------------------------------------
+ */
func errata_x2_2371105_wa
/* Check workaround compatibility. */
mov x17, x30
@@ -295,13 +325,13 @@ func check_errata_2371105
b cpu_rev_var_ls
endfunc check_errata_2371105
-/* ----------------------------------------------------
- * Errata Workaround for Cortex-X2 Errata #2768515
- * This applies to revisions <= r2p1 and is still open.
- * x0: variant[4:7] and revision[0:3] of current cpu.
- * Shall clobber: x0-x17
- * ----------------------------------------------------
- */
+ /* ----------------------------------------------------
+ * Errata Workaround for Cortex-X2 Errata #2768515
+ * This applies to revisions <= r2p1 and is still open.
+ * x0: variant[4:7] and revision[0:3] of current cpu.
+ * Shall clobber: x0-x17
+ * ----------------------------------------------------
+ */
func errata_x2_2768515_wa
mov x17, x30
bl check_errata_2768515
@@ -362,6 +392,7 @@ func cortex_x2_errata_report
report_errata ERRATA_X2_2083908, cortex_x2, 2083908
report_errata ERRATA_X2_2147715, cortex_x2, 2147715
report_errata ERRATA_X2_2216384, cortex_x2, 2216384
+ report_errata ERRATA_X2_2282622, cortex_x2, 2282622
report_errata ERRATA_X2_2371105, cortex_x2, 2371105
report_errata ERRATA_X2_2768515, cortex_x2, 2768515
report_errata WORKAROUND_CVE_2022_23960, cortex_x2, cve_2022_23960
@@ -421,6 +452,11 @@ func cortex_x2_reset_func
bl errata_x2_2147715_wa
#endif
+#if ERRATA_X2_2282622
+ mov x0, x18
+ bl errata_x2_2282622_wa
+#endif
+
#if ERRATA_X2_2371105
mov x0, x18
bl errata_x2_2371105_wa
diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk
index 44ffef188..c9b444797 100644
--- a/lib/cpus/cpu-ops.mk
+++ b/lib/cpus/cpu-ops.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2014-2022, Arm Limited and Contributors. All rights reserved.
+# Copyright (c) 2014-2023, Arm Limited and Contributors. All rights reserved.
# Copyright (c) 2020-2022, NVIDIA Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
@@ -671,6 +671,11 @@ ERRATA_X2_2216384 ?=0
# only to revision r2p0 of the Cortex-X2 cpu, it is fixed in r2p1.
ERRATA_X2_2147715 ?=0
+# Flag to apply erratum 2282622 workaround during reset. This erratum applies
+# to revision r0p0, r1p0, r2p0 and r2p1 of the Cortex-X2 cpu and is still
+# open.
+ERRATA_X2_2282622 ?=0
+
# Flag to apply erratum 2371105 workaround during reset. This erratum applies
# to revision r0p0, r1p0 and r2p0 of the Cortex-X2 cpu and is fixed in r2p1.
ERRATA_X2_2371105 ?=0
@@ -1325,6 +1330,10 @@ $(eval $(call add_define,ERRATA_X2_2216384))
$(eval $(call assert_boolean,ERRATA_X2_2147715))
$(eval $(call add_define,ERRATA_X2_2147715))
+# Process ERRATA_X2_2282622 flag
+$(eval $(call assert_boolean,ERRATA_X2_2282622))
+$(eval $(call add_define,ERRATA_X2_2282622))
+
# Process ERRATA_X2_2371105 flag
$(eval $(call assert_boolean,ERRATA_X2_2371105))
$(eval $(call add_define,ERRATA_X2_2371105))