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| author | Bipin Ravi <bipin.ravi@arm.com> | 2022-12-22 13:31:46 -0600 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2023-02-03 17:10:09 +0000 |
| commit | a9f7a50d30598d2bd7f3d048930e54c520adc69f (patch) | |
| tree | 8cd259db6c2dd19d607a9318bb2b18dd1afc5171 | |
| parent | 379183edc4d34e513678f652703b890c1db95d3b (diff) | |
| download | arm-trusted-firmware-a9f7a50d30598d2bd7f3d048930e54c520adc69f.tar.gz | |
fix(cpus): workaround for Cortex-A710 erratum 2282622
Cortex-A710 erratum 2282622 is a Cat B erratum that applies to
all revisions <=r2p1 and is still open. The workaround was earlier
applied to all revisions <= r2p0, this patch extends it to r2p1.
This was thought to have been fixed in r2p1 which is not the case.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1775101/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Iad38a7fe57bec3f2d8977995acd601dcd9ae69c0
(cherry picked from commit 89d85ad0aad4fef7f56a9e18968b49e2b843ca9d)
| -rw-r--r-- | docs/design/cpu-specific-build-macros.rst | 4 | ||||
| -rw-r--r-- | lib/cpus/aarch64/cortex_a710.S | 12 | ||||
| -rw-r--r-- | lib/cpus/cpu-ops.mk | 3 |
3 files changed, 10 insertions, 9 deletions
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 931142040..7480a84f9 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -511,8 +511,8 @@ For Cortex-A710, the following errata build flags are defined : of the CPU and is fixed in r2p1. - ``ERRATA_A710_2282622``: This applies errata 2282622 workaround to - Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 - of the CPU and is fixed in r2p1. + Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and + r2p1 of the CPU and is still open. - ``ERRATA_A710_2291219``: This applies errata 2291219 workaround to Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 diff --git a/lib/cpus/aarch64/cortex_a710.S b/lib/cpus/aarch64/cortex_a710.S index 3ea55df2c..cebd6f011 100644 --- a/lib/cpus/aarch64/cortex_a710.S +++ b/lib/cpus/aarch64/cortex_a710.S @@ -355,22 +355,22 @@ endfunc check_errata_2216384 /* --------------------------------------------------------------- * Errata Workaround for Cortex-A710 Erratum 2282622. - * This applies to revision r0p0, r1p0 and r2p0. - * It is fixed in r2p1. + * This applies to revision r0p0, r1p0, r2p0 and r2p1. + * It is still open. * Inputs: * x0: variant[4:7] and revision[0:3] of current cpu. * Shall clobber: x0, x1, x17 * --------------------------------------------------------------- */ func errata_a710_2282622_wa - /* Compare x0 against revision r2p0 */ + /* Compare x0 against revision r2p1 */ mov x17, x30 bl check_errata_2282622 cbz x0, 1f /* Apply the workaround */ mrs x1, CORTEX_A710_CPUACTLR2_EL1 - orr x1, x1, BIT(0) + orr x1, x1, #BIT(0) msr CORTEX_A710_CPUACTLR2_EL1, x1 1: @@ -378,8 +378,8 @@ func errata_a710_2282622_wa endfunc errata_a710_2282622_wa func check_errata_2282622 - /* Applies to r0p0, r1p0 and r2p0 */ - mov x1, #0x20 + /* Applies to r0p0, r1p0, r2p0 and r2p1 */ + mov x1, #0x21 b cpu_rev_var_ls endfunc check_errata_2282622 diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index b1f7d27e1..44ffef188 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -563,7 +563,8 @@ ERRATA_A710_2147715 ?=0 ERRATA_A710_2216384 ?=0 # Flag to apply erratum 2282622 workaround during reset. This erratum applies -# to revision r0p0, r1p0 and r2p0 of the Cortex-A710 cpu and is fixed in r2p1. +# to revision r0p0, r1p0, r2p0 and r2p1 of the Cortex-A710 cpu and is still +# open. ERRATA_A710_2282622 ?=0 # Flag to apply erratum 2291219 workaround during reset. This erratum applies |