Use new panic stack on all platforms

Now that the panic stack goes at the end of RAM, there's no overhead
to using it on all platforms.  When it was a dedicated block of
memory, we needed to turn it off on some low-RAM platforms
(e.g. Snow).

BUG=chrome-os-partner:7466
TEST='crash divzero' or 'crash unaligned'; should print dump and reboot
BRANCH=all

Change-Id: Iddfeb134e237538215df51abe4e16ee831b3ae2d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/32037
Reviewed-by: Simon Glass <sjg@chromium.org>

6 files changed, 11 insertions, 28 deletions

diff --git a/README b/README
index 3a122e1894..700adcc624 100644
--- a/README
+++ b/README
@@ -34,12 +34,6 @@ Build Options
 	This is needed on STM32, where the independent watchdog has no early
 	warning feature and the windowed watchdog has a very short period.
 
-- CONFIG_PANIC_NEW_STACK
-
-	When reporting a panic, change to a completely new stack. This might
-	help get a useful trace out a situation where the stack or stack
-	pointer has been corrupted.
-
 - CONFIG_PANIC_HELP
 
 	Report extra information about a panic, such as the fault address,
diff --git a/board/bds/board.h b/board/bds/board.h
index 452b4558b2..6d5cbeaec2 100644
--- a/board/bds/board.h
+++ b/board/bds/board.h
@@ -10,7 +10,6 @@
 
 /* Debug features */
 #define CONFIG_PANIC_HELP
-#define CONFIG_PANIC_NEW_STACK
 #define CONFIG_ASSERT_HELP
 
 /* Optional features */
diff --git a/board/daisy/board.h b/board/daisy/board.h
index 7fa8cf0972..887df7e758 100644
--- a/board/daisy/board.h
+++ b/board/daisy/board.h
@@ -19,7 +19,6 @@
 
 /* Debug features */
 #define CONFIG_PANIC_HELP
-#define CONFIG_PANIC_NEW_STACK
 #define CONFIG_ASSERT_HELP
 
 /* compute RW firmware hash at startup */
diff --git a/board/link/board.h b/board/link/board.h
index 3d24d3fef6..3dc9ff1b40 100644
--- a/board/link/board.h
+++ b/board/link/board.h
@@ -10,7 +10,6 @@
 
 /* Debug features */
 #define CONFIG_PANIC_HELP
-#define CONFIG_PANIC_NEW_STACK
 #define CONFIG_ASSERT_HELP
 
 /* Optional features */
diff --git a/board/snow/board.h b/board/snow/board.h
index 7c9edd3c46..a9ef304701 100644
--- a/board/snow/board.h
+++ b/board/snow/board.h
@@ -21,7 +21,6 @@
 
 /* Debug features */
 #define CONFIG_PANIC_HELP
-#undef  CONFIG_PANIC_NEW_STACK
 #define CONFIG_ASSERT_HELP
 #define CONFIG_CONSOLE_CMDHELP
 
diff --git a/core/cortex-m/panic.c b/core/cortex-m/panic.c
index 9324ef705b..fabd452052 100644
--- a/core/cortex-m/panic.c
+++ b/core/cortex-m/panic.c
@@ -16,10 +16,6 @@
 #include "util.h"
 #include "watchdog.h"
 
-
-/* This is the size of our private panic stack, if we have one */
-#define STACK_SIZE_WORDS	64
-
 /* Whether bus fault is ignored */
 static int bus_fault_ignored;
 
@@ -76,14 +72,12 @@ void panic_putc(int ch)
 	uart_tx_flush();
 }
 
-
 void panic_puts(const char *s)
 {
 	while (*s)
 		panic_putc(*s++);
 }
 
-
 void panic_vprintf(const char *format, va_list args)
 {
 	int pad_width;
@@ -139,7 +133,6 @@ void panic_vprintf(const char *format, va_list args)
 	}
 }
 
-
 void panic_printf(const char *format, ...)
 {
 	va_list args;
@@ -149,7 +142,6 @@ void panic_printf(const char *format, ...)
 	va_end(args);
 }
 
-
 /**
  * Print the name and value of a register
  *
@@ -228,7 +220,6 @@ static const char * const mmfs_name[32] = {
 	NULL,
 };
 
-
 /* Names for the first 5 bits in the DFSR */
 static const char * const dfsr_name[] = {
 	"Halt request",
@@ -238,7 +229,6 @@ static const char * const dfsr_name[] = {
 	"External debug request",
 };
 
-
 /**
  * Helper function to display a separator after the previous item
  *
@@ -254,7 +244,6 @@ static void do_separate(int *count)
 	(*count)++;
 }
 
-
 /**
  * Show a textual representaton of the fault registers
  *
@@ -297,7 +286,6 @@ static void show_fault(uint32_t mmfs, uint32_t hfsr, uint32_t dfsr)
 	}
 }
 
-
 /**
  * Show extra information that might be useful to understand a panic()
  *
@@ -399,17 +387,25 @@ void exception_panic(void)
 {
 	/* Naked call so we can extract raw LR and IPSR */
 
-#ifdef CONFIG_PANIC_NEW_STACK
+	/*
+	 * Set a new stack pointer at the end of RAM, before the saved
+	 * exception data.
+	 */
 	asm volatile(
 		/*
 		 * This instruction will generate ldr rx, [pc, #offset]
 		 * followed by a mov sp, rx.  See below for more explanation.
+		 *
+		 * Oddly, gcc is able to add 4 to the value loaded here to
+		 * compute [pregs] below if the asm blocks are separate, but if
+		 * they are merged it uses two temporary registers and two
+		 * immediate values.
 		 */
 		"mov sp, %[pstack]\n" : :
 			[pstack] "r" (pstack_addr)
 		);
-#endif
 
+	/* Save registers and branch directly to panic handler */
 	asm volatile(
 		/*
 		 * This instruction will generate ldr rx, [pc, #offset]
@@ -432,7 +428,6 @@ void exception_panic(void)
 		);
 }
 
-
 void bus_fault_handler(void) __attribute__((naked));
 void bus_fault_handler(void)
 {
@@ -440,13 +435,11 @@ void bus_fault_handler(void)
 		exception_panic();
 }
 
-
 void ignore_bus_fault(int ignored)
 {
 	bus_fault_ignored = ignored;
 }
 
-
 #ifdef CONFIG_ASSERT_HELP
 void panic_assert_fail(const char *msg, const char *func, const char *fname,
 		       int linenum)
@@ -458,7 +451,6 @@ void panic_assert_fail(const char *msg, const char *func, const char *fname,
 }
 #endif
 
-
 void panic(const char *msg)
 {
 	panic_printf("\n** PANIC: %s\n", msg);
@@ -466,6 +458,7 @@ void panic(const char *msg)
 }
 
 
+
 /*****************************************************************************/
 /* Console commands */