diff options
author | jongpil19.jung <jongpil19.jung@samsung.com> | 2015-09-15 09:46:14 +0900 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2015-09-15 19:17:53 -0700 |
commit | 4b3c13ddfefd229dde49fb4cbf5a6bfc49f64973 (patch) | |
tree | 7b9c40a770c122a4be73b162e6fc3d4d8282b2c5 | |
parent | 3154abd5c358527eecc385b67c4f0fd5f1a022ce (diff) | |
download | chrome-ec-4b3c13ddfefd229dde49fb4cbf5a6bfc49f64973.tar.gz |
Celes: Add define to support GD25Q41B for External EC ROM.
MEC1322 use external spi rom. Now, we support W25X40 and W25Q64.
Celes will use GD25Q41B for external EC ROM.
So, we need to add define for GD25Q41B.
BUG=chrome-os-partner:45246
BRANCH=master
TEST=emerge-strago chromeos-ec
Change-Id: Idec79955306b2dd79027fa57afc15ed8474413e6
Signed-off-by: jongpil19.jung <jongpil19.jung@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/299576
Commit-Ready: Jongpil Jung <jongpil19.jung@samsung.com>
Tested-by: Jongpil Jung <jongpil19.jung@samsung.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
-rw-r--r-- | common/spi_flash_reg.c | 2 | ||||
-rw-r--r-- | include/config.h | 3 | ||||
-rw-r--r-- | include/spi_flash_reg.h | 2 |
3 files changed, 5 insertions, 2 deletions
diff --git a/common/spi_flash_reg.c b/common/spi_flash_reg.c index 6eab99f1cc..9ee814bbe3 100644 --- a/common/spi_flash_reg.c +++ b/common/spi_flash_reg.c @@ -37,7 +37,7 @@ struct protect_range { * none or half of the ROM. The table is searched sequentially, so ordering * according to likely configurations improves performance slightly. */ -#ifdef CONFIG_SPI_FLASH_W25X40 +#if defined(CONFIG_SPI_FLASH_W25X40) || defined(CONFIG_SPI_FLASH_GD25Q41B) static const struct protect_range spi_flash_protect_ranges[] = { { X, X, X, { 0, 0, 0 }, 0, 0 }, /* No protection */ { X, X, 1, { 0, 1, 1 }, 0, 0x40000 }, /* Lower 1/2 */ diff --git a/include/config.h b/include/config.h index e6d4409a5f..c14af4bf7d 100644 --- a/include/config.h +++ b/include/config.h @@ -1427,6 +1427,9 @@ /* Support W25X40 SPI flash */ #undef CONFIG_SPI_FLASH_W25X40 +/* Support GD25Q41B SPI flash */ +#undef CONFIG_SPI_FLASH_GD25Q41B + /* SPI flash part supports SR2 register */ #undef CONFIG_SPI_FLASH_HAS_SR2 diff --git a/include/spi_flash_reg.h b/include/spi_flash_reg.h index e8d9144a6f..e42d9baa99 100644 --- a/include/spi_flash_reg.h +++ b/include/spi_flash_reg.h @@ -34,7 +34,7 @@ /* SR2 register existence based upon chip */ #ifdef CONFIG_SPI_FLASH_W25X40 #undef CONFIG_SPI_FLASH_HAS_SR2 -#elif defined(CONFIG_SPI_FLASH_W25Q64) +#elif defined(CONFIG_SPI_FLASH_W25Q64) || defined(CONFIG_SPI_FLASH_GD25Q41B) #define CONFIG_SPI_FLASH_HAS_SR2 #endif |