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author | Caveh Jalali <caveh@chromium.org> | 2021-02-18 02:52:07 -0800 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-02-19 02:21:53 +0000 |
commit | 494e05b3d88df5deaa2ad977953ff7080b7e3a58 (patch) | |
tree | 8d14a40ae035de6a498e517d6be4adb85ac8490d | |
parent | 6c6754b482e526bfc3b4be3c009b06e07116edde (diff) | |
download | chrome-ec-494e05b3d88df5deaa2ad977953ff7080b7e3a58.tar.gz |
brya: Fix USB DB I2C bus assignments
The USB daughterboard control chips are on I2C bus 6_1, not 6_0.
BRANCH=none
BUG=b:173575131
TEST=no more I2C errors when trying to access chips
Change-Id: Ia542b42612a091a1bf85d1be4b6bd186b5f0bb91
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2704033
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
-rw-r--r-- | board/brya/board.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/board/brya/board.h b/board/brya/board.h index 399e55de25..4a603df8ee 100644 --- a/board/brya/board.h +++ b/board/brya/board.h @@ -56,15 +56,15 @@ #define I2C_PORT_USB_C2_TCPC NPCX_I2C_PORT1_0 /* dual TCPC with C0 */ #define I2C_PORT_USB_C0_PPC NPCX_I2C_PORT2_0 -#define I2C_PORT_USB_C1_PPC NPCX_I2C_PORT6_0 +#define I2C_PORT_USB_C1_PPC NPCX_I2C_PORT6_1 #define I2C_PORT_USB_C2_PPC NPCX_I2C_PORT2_0 #define I2C_PORT_USB_C0_BC12 NPCX_I2C_PORT2_0 -#define I2C_PORT_USB_C1_BC12 NPCX_I2C_PORT6_0 +#define I2C_PORT_USB_C1_BC12 NPCX_I2C_PORT6_1 #define I2C_PORT_USB_C2_BC12 NPCX_I2C_PORT2_0 #define I2C_PORT_USB_C0_MUX NPCX_I2C_PORT3_0 -#define I2C_PORT_USB_C1_MUX NPCX_I2C_PORT6_0 +#define I2C_PORT_USB_C1_MUX NPCX_I2C_PORT6_1 #define I2C_PORT_USB_C2_MUX NPCX_I2C_PORT3_0 #define I2C_PORT_BATTERY NPCX_I2C_PORT5_0 |