phaser: add psl code back for some sku request

Add the the PSL code to the phaser's board.c file,
and use sku id to distinguish for enter PSL or not.

BUG=b:203442963
BRANCH=None
TEST=make buildall -j
In Phaser, keep KSI1, KSI2, and KSI3 on when system in hibernate
In Laser, only KSI2(powered by H1) on when system in hibernate.

Signed-off-by: arthur.lin <arthur.lin@lcfc.corp-partner.google.com>
Change-Id: I55ee776d5fd4c500511ee14f0715c3850a4e16d0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3372133
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Henry Sun <henrysun@google.com>

1 files changed, 90 insertions, 1 deletions

diff --git a/board/phaser/board.c b/board/phaser/board.c
index 3db1dc2345..6259ad3cd7 100644
--- a/board/phaser/board.c
+++ b/board/phaser/board.c
@@ -24,6 +24,7 @@
 #include "power.h"
 #include "power_button.h"
 #include "switch.h"
+#include "system_chip.h"
 #include "task.h"
 #include "tablet_mode.h"
 #include "tcpm/tcpci.h"
@@ -41,6 +42,7 @@
 
 static uint8_t sku_id;
 static bool support_syv_ppc;
+static uint8_t is_psl_hibernate;
 
 /* Check PPC ID and board version to decide which one ppc is used. */
 static bool board_is_support_syv_ppc(void)
@@ -240,12 +242,99 @@ static void cbi_init(void)
 	board_update_sensor_config_from_sku();
 
 	support_syv_ppc = board_is_support_syv_ppc();
+
+	/* Please correct the SKU ID checking if it is not right */
+	if (sku_id == 1 || sku_id == 2 || sku_id == 3 || sku_id == 4)
+		is_psl_hibernate = 0;
+	else
+		is_psl_hibernate = 1;
 }
 DECLARE_HOOK(HOOK_INIT, cbi_init, HOOK_PRIO_INIT_I2C + 1);
 
+static void system_psl_type_sel(int psl_no, uint32_t flags)
+{
+	/* Set PSL input events' type as level or edge trigger */
+	if ((flags & GPIO_INT_F_HIGH) || (flags & GPIO_INT_F_LOW))
+		CLEAR_BIT(NPCX_GLUE_PSL_CTS, psl_no + 4);
+	else if ((flags & GPIO_INT_F_RISING) || (flags & GPIO_INT_F_FALLING))
+		SET_BIT(NPCX_GLUE_PSL_CTS, psl_no + 4);
+
+	/*
+	 * Set PSL input events' polarity is low (high-to-low) active or
+	 * high (low-to-high) active
+	 */
+	if (flags & GPIO_HIB_WAKE_HIGH)
+		SET_BIT(NPCX_DEVALT(ALT_GROUP_D), 2 * psl_no);
+	else
+		CLEAR_BIT(NPCX_DEVALT(ALT_GROUP_D), 2 * psl_no);
+}
+
+int system_config_psl_mode(enum gpio_signal signal)
+{
+	int psl_no;
+	const struct gpio_info *g = gpio_list + signal;
+
+	if (g->port == GPIO_PORT_D && g->mask == MASK_PIN2) /* GPIOD2 */
+		psl_no = 0;
+	else if (g->port == GPIO_PORT_0 && (g->mask & 0x07)) /* GPIO00/01/02 */
+		psl_no = GPIO_MASK_TO_NUM(g->mask) + 1;
+	else
+		return 0;
+
+	system_psl_type_sel(psl_no, g->flags);
+	return 1;
+}
+
+void system_enter_psl_mode(void)
+{
+	/* Configure pins from GPIOs to PSL which rely on VSBY power rail. */
+	gpio_config_module(MODULE_PMU, 1);
+
+	/*
+	 * Only PSL_IN events can pull PSL_OUT to high and reboot ec.
+	 * We should treat it as wake-up pin reset.
+	 */
+	NPCX_BBRAM(BBRM_DATA_INDEX_WAKE) = HIBERNATE_WAKE_PIN;
+
+	/*
+	 * Pull PSL_OUT (GPIO85) to low to cut off ec's VCC power rail by
+	 * setting bit 5 of PDOUT(8).
+	 */
+	SET_BIT(NPCX_PDOUT(GPIO_PORT_8), 5);
+}
+
+/* Hibernate function implemented by PSL (Power Switch Logic) mode. */
+noreturn void __keep __enter_hibernate_in_psl(void)
+{
+	system_enter_psl_mode();
+	/* Spin and wait for PSL cuts power; should never return */
+	while (1)
+		;
+}
 void board_hibernate_late(void)
 {
-	NPCX_KBSINPU = 0x0A;
+	int i;
+
+	/*
+	 * If the SKU cannot use PSL hibernate, immediately return to go the
+	 * non-PSL hibernate flow.
+	 */
+	if (!is_psl_hibernate) {
+		NPCX_KBSINPU = 0x0A;
+		return;
+	}
+
+	for (i = 0; i < hibernate_wake_pins_used; i++) {
+		/* Config PSL pins setting for wake-up inputs */
+		if (!system_config_psl_mode(hibernate_wake_pins[i]))
+			ccprintf("Invalid PSL setting in wake-up pin %d\n", i);
+	}
+
+	/* Clear all pending IRQ otherwise wfi will have no affect */
+	for (i = NPCX_IRQ_0 ; i < NPCX_IRQ_COUNT ; i++)
+		task_clear_pending_irq(i);
+
+	__enter_hibernate_in_psl();
 }
 
 /* This callback disables keyboard when convertibles are fully open */