summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorTom Hughes <tomhughes@chromium.org>2021-11-16 09:25:35 -0800
committerChromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com>2022-10-18 00:20:08 +0000
commitb9be252fa3d0acf5c0306e823680564117750c3c (patch)
tree90177ca48e98f2424a0b37354237473563b812bb
parent1b684a8e0473eff0f29ecabdc70fac3cf378d2bd (diff)
downloadchrome-ec-b9be252fa3d0acf5c0306e823680564117750c3c.tar.gz
test: Add panic test
Add a test for ARM that verifies that exception_panic() correctly preserves the registers we expect it to. BRANCH=none BUG=b:172020503 TEST=./test/run_device_tests.py --board bloonchipper -t panic TEST=make BOARD=discovery-stm32f072 test-panic openocd -c "set BOARD discovery-stm32f072" \ -c "set BUILD_DIR build/discovery-stm32f072/panic" \ -f board/discovery-stm32f072/openocd-flash.cfg screen /dev/ttyUSB1 > runtest Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I592483c922652df8a4fb2b0a0a5fb57b1480b8b6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3288761 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
-rw-r--r--board/discovery-stm32f072/build.mk3
-rw-r--r--board/hatch_fp/build.mk1
-rw-r--r--board/nocturne_fp/build.mk1
-rw-r--r--test/build.mk1
-rw-r--r--test/panic.c121
-rw-r--r--test/panic.tasklist9
-rwxr-xr-xtest/run_device_tests.py1
-rw-r--r--test/test_config.h4
8 files changed, 141 insertions, 0 deletions
diff --git a/board/discovery-stm32f072/build.mk b/board/discovery-stm32f072/build.mk
index 21613f74eb..3e87efe412 100644
--- a/board/discovery-stm32f072/build.mk
+++ b/board/discovery-stm32f072/build.mk
@@ -11,3 +11,6 @@ CHIP_FAMILY:=stm32f0
CHIP_VARIANT:=stm32f07x
board-y=board.o
+
+test-list-y=\
+ panic \
diff --git a/board/hatch_fp/build.mk b/board/hatch_fp/build.mk
index 317c6c08eb..4afdb1c1c3 100644
--- a/board/hatch_fp/build.mk
+++ b/board/hatch_fp/build.mk
@@ -41,6 +41,7 @@ test-list-y=\
fpsensor_hw \
mpu \
mutex \
+ panic \
panic_data \
pingpong \
printf \
diff --git a/board/nocturne_fp/build.mk b/board/nocturne_fp/build.mk
index 358bd13093..c15535555e 100644
--- a/board/nocturne_fp/build.mk
+++ b/board/nocturne_fp/build.mk
@@ -41,6 +41,7 @@ test-list-y=\
fpsensor_hw \
mpu \
mutex \
+ panic \
panic_data \
pingpong \
printf \
diff --git a/test/build.mk b/test/build.mk
index aeb6fdf956..4f9674b306 100644
--- a/test/build.mk
+++ b/test/build.mk
@@ -223,6 +223,7 @@ kasa-y=kasa.o
mpu-y=mpu.o
mutex-y=mutex.o
newton_fit-y=newton_fit.o
+panic-y=panic.o
panic_data-y=panic_data.o
pingpong-y=pingpong.o
power_button-y=power_button.o
diff --git a/test/panic.c b/test/panic.c
new file mode 100644
index 0000000000..a7333eda98
--- /dev/null
+++ b/test/panic.c
@@ -0,0 +1,121 @@
+/* Copyright 2021 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include "assert.h"
+#include "panic.h"
+#include "system.h"
+#include "task.h"
+#include "test_util.h"
+
+#if !(defined(CORE_CORTEX_M) || defined(CORE_CORTEX_M0))
+#error "Architecture not supported"
+#endif
+
+struct reg_vals {
+ int index;
+ uint32_t val;
+};
+
+static const struct reg_vals EXPECTED[] = {
+ { .index = CORTEX_PANIC_REGISTER_R4, .val = 0xecec0004 },
+ { .index = CORTEX_PANIC_REGISTER_R5, .val = 0xecec0005 },
+ { .index = CORTEX_PANIC_REGISTER_R6, .val = 0xecec0006 },
+ { .index = CORTEX_PANIC_REGISTER_R7, .val = 0xecec0007 },
+ { .index = CORTEX_PANIC_REGISTER_R8, .val = 0xecec0008 },
+ { .index = CORTEX_PANIC_REGISTER_R9, .val = 0xecec0009 },
+ { .index = CORTEX_PANIC_REGISTER_R10, .val = 0xecec000a },
+ { .index = CORTEX_PANIC_REGISTER_R11, .val = 0xecec000b },
+};
+
+test_static int test_exception_panic_registers(void)
+{
+ if (IS_ENABLED(CORE_CORTEX_M)) {
+ asm volatile("ldr r0, =0xecec0000\n"
+ "ldr r1, =0xecec0001\n"
+ "ldr r2, =0xecec0002\n"
+ "ldr r3, =0xecec0003\n"
+ "ldr r4, =0xecec0004\n"
+ "ldr r5, =0xecec0005\n"
+ "ldr r6, =0xecec0006\n"
+ "ldr r7, =0xecec0007\n"
+ "ldr r8, =0xecec0008\n"
+ "ldr r9, =0xecec0009\n"
+ "ldr r10, =0xecec000a\n"
+ "ldr r11, =0xecec000b\n"
+ "ldr r14, =0xecec000e\n"
+ /* Undefined instruction. */
+ "udf #0\n");
+ } else if (IS_ENABLED(CORE_CORTEX_M0)) {
+ asm volatile("ldr r1, =0xecec0001\n"
+ "ldr r2, =0xecec0002\n"
+ "ldr r3, =0xecec0003\n"
+ "ldr r4, =0xecec0004\n"
+ "ldr r5, =0xecec0005\n"
+ "ldr r6, =0xecec0006\n"
+ "ldr r7, =0xecec0007\n"
+ "ldr r0, =0xecec0008\n"
+ "mov r8, r0\n"
+ "ldr r0, =0xecec0009\n"
+ "mov r9, r0\n"
+ "ldr r0, =0xecec000a\n"
+ "mov r10, r0\n"
+ "ldr r0, =0xecec000b\n"
+ "mov r11, r0\n"
+ "ldr r0, =0xecec000e\n"
+ "mov r14, r0\n"
+ /* Undefined instruction. */
+ "udf #0\n");
+ }
+ __builtin_unreachable();
+}
+
+test_static void run_test_step1(void)
+{
+ ccprintf("Step 1: Panic\n");
+ system_set_scratchpad(TEST_STATE_MASK(TEST_STATE_STEP_2));
+ RUN_TEST(test_exception_panic_registers);
+}
+
+test_static int run_test_step2(void)
+{
+ struct panic_data *data;
+ int i;
+
+ ccprintf("Step 2: Read panic data\n");
+ data = panic_get_data();
+ for (i = 0; i < ARRAY_SIZE(EXPECTED); i++) {
+ TEST_EQ(EXPECTED[i].val, data->cm.regs[EXPECTED[i].index],
+ "%04x");
+ cflush();
+ }
+ return EC_SUCCESS;
+}
+
+void test_run_step(uint32_t state)
+{
+ int ret;
+
+ if (state & TEST_STATE_MASK(TEST_STATE_STEP_1))
+ run_test_step1();
+ else if (state & TEST_STATE_MASK(TEST_STATE_STEP_2)) {
+ ret = run_test_step2();
+ if (ret == EC_SUCCESS)
+ test_reboot_to_next_step(TEST_STATE_PASSED);
+ else
+ test_reboot_to_next_step(TEST_STATE_FAILED);
+ }
+}
+
+int task_test(void *unused)
+{
+ test_run_multistep();
+ return EC_SUCCESS;
+}
+
+void run_test(int argc, const char **argv)
+{
+ msleep(30); /* Wait for TASK_ID_TEST to initialize */
+ task_wake(TASK_ID_TEST);
+}
diff --git a/test/panic.tasklist b/test/panic.tasklist
new file mode 100644
index 0000000000..35a6edd545
--- /dev/null
+++ b/test/panic.tasklist
@@ -0,0 +1,9 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/**
+ * See CONFIG_TASK_LIST in config.h for details.
+ */
+#define CONFIG_TEST_TASK_LIST TASK_TEST(TEST, task_test, NULL, TASK_STACK_SIZE)
diff --git a/test/run_device_tests.py b/test/run_device_tests.py
index 55a6def594..66109cbf93 100755
--- a/test/run_device_tests.py
+++ b/test/run_device_tests.py
@@ -246,6 +246,7 @@ class AllTests:
finish_regexes=[board_config.mpu_regex],
),
TestConfig(test_name="mutex"),
+ TestConfig(test_name="panic"),
TestConfig(test_name="pingpong"),
TestConfig(test_name="printf"),
TestConfig(test_name="queue"),
diff --git a/test/test_config.h b/test/test_config.h
index bc28b7d966..3f87bccc35 100644
--- a/test/test_config.h
+++ b/test/test_config.h
@@ -672,5 +672,9 @@ int ncp15wb_calculate_temp(uint16_t adc);
#define I2C_BITBANG_PORT_COUNT 1
#endif
+#ifdef TEST_PANIC
+#undef CONFIG_PANIC_STRIP_GPR
+#endif
+
#endif /* TEST_BUILD */
#endif /* __TEST_TEST_CONFIG_H */