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| author | Tom Hughes <tomhughes@chromium.org> | 2022-10-13 13:54:47 -0700 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-10-17 22:57:17 +0000 |
| commit | eae5e48f0a3e741578914bd21a49fb5fe6f6ed63 (patch) | |
| tree | 9e3e59576f7828643ac2ed598fd9d88c5cdd0687 | |
| parent | 319ef2112e2ea4f6f39e9b62fb354389b9281774 (diff) | |
| download | chrome-ec-eae5e48f0a3e741578914bd21a49fb5fe6f6ed63.tar.gz | |
power/icelake: add casts for power signals
When building with clang, it warns:
power/icelake.c:43:11: error: implicit conversion from enumeration type
'enum espi_vw_signal' to different enumeration type 'enum gpio_signal'
[-Werror,-Wenum-conversion]
.gpio = SLP_S3_SIGNAL_L,
^~~~~~~~~~~~~~~
include/power/intel_x86.h:36:25: note: expanded from macro 'SLP_S3_SIGNAL_L'
^~~~~~~~~~~
Although "enum espi_vw_signal" and "enum gpio_signal" are not directly
compatible, it appears that the code in power/common.c takes that into
account by calling espi_signal_is_vw().
clang also produces another warning:
power/icelake.c:267:19: error: implicit conversion from enumeration type
'enum espi_vw_signal' to different enumeration type 'enum gpio_signal'
[-Werror,-Wenum-conversion]
gpio_set_flags(SLP_S3_SIGNAL_L, GPIO_ODR_LOW);
~~~~~~~~~~~~~~ ^~~~~~~~~~~~~~~
include/power/intel_x86.h:36:25: note: expanded from macro 'SLP_S3_SIGNAL_L'
^~~~~~~~~~~
However, this warning should not be emitted because this code is inside
an IS_ENABLED(CONFIG_CHIPSET_SLP_S3_L_OVERRIDE) block. Changing
IS_ENABLED(CONFIG_CHIPSET_SLP_S3_L_OVERRIDE) to
"#if defined(CONFIG_CHIPSET_SLP_S3_L_OVERRIDE)" works around this.
BRANCH=none
BUG=b:172020503
TEST=./util/compare_build.sh -b all -j 120
=> MATCH
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I1fe6bbb1881572a3eff756220ee960d397344c69
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3953255
Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
| -rw-r--r-- | power/icelake.c | 27 |
1 files changed, 14 insertions, 13 deletions
diff --git a/power/icelake.c b/power/icelake.c index 2fae215ab1..e81a6f6942 100644 --- a/power/icelake.c +++ b/power/icelake.c @@ -40,7 +40,7 @@ const struct power_signal_info power_signal_list[] = { .name = "SLP_S0_DEASSERTED", }, [X86_SLP_S3_DEASSERTED] = { - .gpio = SLP_S3_SIGNAL_L, + .gpio = (enum gpio_signal)SLP_S3_SIGNAL_L, .flags = POWER_SIGNAL_ACTIVE_HIGH, .name = "SLP_S3_DEASSERTED", }, @@ -178,8 +178,8 @@ static void dsw_pwrok_pass_thru(void) /* Pass-through DSW_PWROK to ICL. */ if (dswpwrok_in != gpio_get_level(GPIO_PCH_DSW_PWROK)) { - if (IS_ENABLED(CONFIG_CHIPSET_SLP_S3_L_OVERRIDE) && - dswpwrok_in) { +#if defined(CONFIG_CHIPSET_SLP_S3_L_OVERRIDE) + if (dswpwrok_in) { /* * Once DSW_PWROK is high, reconfigure SLP_S3_L back to * an input after a short delay. @@ -189,6 +189,7 @@ static void dsw_pwrok_pass_thru(void) gpio_reset(SLP_S3_SIGNAL_L); power_signal_enable_interrupt(SLP_S3_SIGNAL_L); } +#endif CPRINTS("Pass thru GPIO_DSW_PWROK: %d", dswpwrok_in); /* @@ -256,16 +257,16 @@ enum power_state power_handle_state(enum power_state state) switch (state) { case POWER_G3S5: - if (IS_ENABLED(CONFIG_CHIPSET_SLP_S3_L_OVERRIDE)) { - /* - * Prevent glitches on the SLP_S3_L and PCH_PWROK - * signals while when the PP3300_A rail is turned on. - * Drive SLP_S3_L from the EC until DSW_PWROK is high. - */ - CPRINTS("Drive SLP_S3_L low during PP3300_A rampup"); - power_signal_disable_interrupt(SLP_S3_SIGNAL_L); - gpio_set_flags(SLP_S3_SIGNAL_L, GPIO_ODR_LOW); - } +#if defined(CONFIG_CHIPSET_SLP_S3_L_OVERRIDE) + /* + * Prevent glitches on the SLP_S3_L and PCH_PWROK + * signals while when the PP3300_A rail is turned on. + * Drive SLP_S3_L from the EC until DSW_PWROK is high. + */ + CPRINTS("Drive SLP_S3_L low during PP3300_A rampup"); + power_signal_disable_interrupt(SLP_S3_SIGNAL_L); + gpio_set_flags(SLP_S3_SIGNAL_L, GPIO_ODR_LOW); +#endif /* Default behavior - turn on PP5000 rail first */ if (!IS_ENABLED(CONFIG_CHIPSET_PP3300_RAIL_FIRST)) |