zephyr: Add initial USB-C support

This includes a variety of things to get volteer to build with some
amount of USB-C support.

It seems to charge the battery and prevent booting when the battery is
too low.

Much work remains.

In particular:
- check the Kconfig help and add missing help
- possibly add a TCPM Kconfig option for grouping
- BCI1.2 event handler
- TCPMv2 event generator

BUG=b:175434113, b:176171475
BRANCH=none
TEST=build and run on volteer:
20-12-11 17:43:12.344 uart:~$ tcpci_dump 0
20-12-11 17:44:45.493   VENDOR_ID                     (0x00) = 0x0451
20-12-11 17:44:45.493   PRODUCT_ID                    (0x02) = 0x0422
20-12-11 17:44:45.493   BCD_DEV                       (0x04) = 0x0100
20-12-11 17:44:45.504   TC_REV                        (0x06) = 0x0011
20-12-11 17:44:45.504   PD_REV                        (0x08) = 0x2011
20-12-11 17:44:45.504   PD_INT_REV                    (0x0a) = 0x1010
20-12-11 17:44:45.515   ALERT                         (0x10) = 0x000f
20-12-11 17:44:45.515   ALERT_MASK                    (0x12) = 0x007f
20-12-11 17:44:45.526   POWER_STATUS_MASK             (0x14) =   0x04
20-12-11 17:44:45.526   FAULT_STATUS_MASK             (0x15) =   0x7f
20-12-11 17:44:45.526   EXT_STATUS_MASK               (0x16) =   0x00
20-12-11 17:44:45.536   ALERT_EXTENDED_MASK           (0x17) =   0x00
20-12-11 17:44:45.536   CONFIG_STD_OUTPUT             (0x18) =   0x60
20-12-11 17:44:45.536   TCPC_CTRL                     (0x19) =   0x11
20-12-11 17:44:45.547   ROLE_CTRL                     (0x1a) =   0x1a
20-12-11 17:44:45.547   FAULT_CTRL                    (0x1b) =   0x06
20-12-11 17:44:45.558   POWER_CTRL                    (0x1c) =   0x70
20-12-11 17:44:45.558   CC_STATUS                     (0x1d) =   0x13
20-12-11 17:44:45.558   POWER_STATUS                  (0x1e) =   0x8c
20-12-11 17:44:45.569   FAULT_STATUS                  (0x1f) =   0x00
20-12-11 17:44:45.569   EXT_STATUS                    (0x20) =   0x00
20-12-11 17:44:45.580   ALERT_EXT                     (0x21) =   0x00
20-12-11 17:44:45.580   DEV_CAP_1                     (0x24) = 0x1e98
20-12-11 17:44:45.580   DEV_CAP_2                     (0x26) = 0x00c5
20-12-11 17:44:45.592   STD_INPUT_CAP                 (0x28) =   0x00
20-12-11 17:44:45.592   STD_OUTPUT_CAP                (0x29) =   0x00
20-12-11 17:44:45.592   CONFIG_EXT_1                  (0x2a) =   0x00
20-12-11 17:44:45.602   MSG_HDR_INFO                  (0x2e) =   0x02
20-12-11 17:44:45.602   RX_DETECT                     (0x2f) =   0x00
20-12-11 17:44:45.613   RX_BYTE_CNT                   (0x30) =   0x00
20-12-11 17:44:45.613   RX_BUF_FRAME_TYPE             (0x31) =   0x00
20-12-11 17:44:45.613   TRANSMIT                      (0x50) =   0x00
20-12-11 17:44:45.624   VBUS_VOLTAGE                  (0x70) = 0x0000
20-12-11 17:44:45.624   VBUS_SINK_DISCONNECT_THRESH   (0x72) = 0x0000
20-12-11 17:44:45.633   VBUS_STOP_DISCHARGE_THRESH    (0x74) = 0x0000
20-12-11 17:44:45.633   VBUS_VOLTAGE_ALARM_HI_CFG     (0x76) = 0x0000
20-12-11 17:44:45.633   VBUS_VOLTAGE_ALARM_LO_CFG     (0x78) = 0x0000
20-12-11 17:44:49.544 uart:~$ ppc_dump 0
20-12-11 17:45:09.838 FUNC_SET1 [50h] = 0x0b
20-12-11 17:45:09.838 FUNC_SET2 [51h] = 0x18
20-12-11 17:45:09.838 FUNC_SET3 [52h] = 0x6a
20-12-11 17:45:09.838 FUNC_SET4 [53h] = 0xfe
20-12-11 17:45:09.838 FUNC_SET5 [54h] = 0x37
20-12-11 17:45:09.838 FUNC_SET6 [55h] = 0xc1
20-12-11 17:45:09.847 FUNC_SET7 [56h] = 0x70
20-12-11 17:45:09.847 FUNC_SET8 [57h] = 0xbd
20-12-11 17:45:09.847 FUNC_SET9 [58h] = 0x34
20-12-11 17:45:09.847 FUNC_SET10 [59h] = 0x70
20-12-11 17:45:09.847 FUNC_SET11 [5ah] = 0x24
20-12-11 17:45:09.858 FUNC_SET12 [5bh] = 0x70
20-12-11 17:45:09.858 INT_STATUS_REG1 [2fh] = 0x00
20-12-11 17:45:09.858 INT_STATUS_REG2 [30h] = 0x80
20-12-11 17:45:09.858 INT_STATUS_REG3 [31h] = 0x09
20-12-11 17:45:09.858 INT_STATUS_REG4 [32h] = 0x08
20-12-11 17:45:09.862 INT_TRIP_RISE_REG1 [20h] = 0x80
20-12-11 17:45:09.862 INT_TRIP_RISE_REG2 [21h] = 0x00
20-12-11 17:45:09.874 INT_TRIP_RISE_REG3 [22h] = 0x05
20-12-11 17:45:09.874 INT_TRIP_FALL_REG1 [23h] = 0x80
20-12-11 17:45:09.874 INT_TRIP_FALL_REG2 [24h] = 0x00
20-12-11 17:45:09.879 INT_TRIP_FALL_REG3 [25h] = 0x05
20-12-11 17:45:09.879 INT_MASK_RISE_REG1 [26h] = 0xef
20-12-11 17:45:09.879 INT_MASK_RISE_REG2 [27h] = 0xe1
20-12-11 17:45:09.892 INT_MASK_RISE_REG3 [28h] = 0xff
20-12-11 17:45:09.892 INT_MASK_FALL_REG1 [29h] = 0xff
20-12-11 17:45:09.892 INT_MASK_FALL_REG2 [2ah] = 0xef
20-12-11 17:45:09.892 INT_MASK_FALL_REG3 [2bh] = 0x8f
...
20-12-11 18:21:17.576 battery
20-12-11 18:21:17.933   Status:    0x0080 INIT
20-12-11 18:21:17.933   Param flags:00000003
20-12-11 18:21:17.933   Temp:      0x0b64 = %.1d K (%.1d C)
20-12-11 18:21:17.933   V:         0x2aa8 = 10920 mV
20-12-11 18:21:17.933   V-desired: 0x3390 = 13200 mV
20-12-11 18:21:17.944   I:         0x00bd = 189 mA(CHG)
20-12-11 18:21:17.944   I-desired: 0x0a19 = 2585 mA
20-12-11 18:21:17.944   Charging:  Allowed
20-12-11 18:21:17.944   Charge:    3 %
20-12-11 18:21:17.948   Manuf:     LG
20-12-11 18:21:17.948   Device:    AC17A8
20-12-11 18:21:17.953   Chem:      LIO
20-12-11 18:21:17.960   Serial:    0xb754
20-12-11 18:21:17.960   V-design:  0x2d1e = 11550 mV
20-12-11 18:21:17.965   Mode:      0x6001
20-12-11 18:21:17.965   Abs charge:3 %
20-12-11 18:21:17.974   Remaining: 139 mAh
20-12-11 18:21:17.974   Cap-full:  5093 mAh (4991 mAh with 98 % compensation)
20-12-11 18:21:17.983   Display:   0.0 %
20-12-11 18:21:17.983     Design:  5360 mAh
20-12-11 18:21:17.993   Time-full: 26h:21
20-12-11 18:21:17.993     Empty:   0h:0

Cq-Depend: chromium:2585918
Change-Id: I0d852169c9cbbc70603944b70f4708111abd5b42
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2587225
Reviewed-by: Keith Short <keithshort@chromium.org>

5 files changed, 589 insertions, 0 deletions

diff --git a/include/usb_sm.h b/include/usb_sm.h
index d8eff5190a..2b5939bc04 100644
--- a/include/usb_sm.h
+++ b/include/usb_sm.h
@@ -8,6 +8,8 @@
 #ifndef __CROS_EC_USB_SM_H
 #define __CROS_EC_USB_SM_H
 
+#include "compiler.h"	/* for typeof() on Zephyr */
+
 /* Function pointer that implements a portion of a usb state */
 typedef void (*state_execution)(const int port);
 
diff --git a/zephyr/CMakeLists.txt b/zephyr/CMakeLists.txt
index 3ebd40a187..05710985f0 100644
--- a/zephyr/CMakeLists.txt
+++ b/zephyr/CMakeLists.txt
@@ -51,6 +51,10 @@ zephyr_sources_ifdef(CONFIG_PLATFORM_EC_BATTERY_SMART
                                                 "${PLATFORM_EC}/driver/battery/smart.c")
 zephyr_sources_ifdef(CONFIG_PLATFORM_EC_CHARGER_ISL9241
                                                 "${PLATFORM_EC}/driver/charger/isl9241.c")
+zephyr_sources_ifdef(CONFIG_PLATFORM_EC_CHARGE_MANAGER
+                                                "${PLATFORM_EC}/common/charger.c"
+                                                "${PLATFORM_EC}/common/charge_manager.c"
+                                                "${PLATFORM_EC}/common/charge_state_v2.c")
 
 zephyr_sources_ifdef(CONFIG_PLATFORM_EC_CBI     "${PLATFORM_EC}/common/cbi.c")
 zephyr_sources_ifdef(CONFIG_PLATFORM_EC_POWERSEQ
@@ -81,4 +85,42 @@ zephyr_sources_ifdef(CONFIG_PLATFORM_EC_POWERSEQ_INTEL
                                                 "${PLATFORM_EC}/power/intel_x86.c")
 zephyr_sources_ifdef(CONFIG_PLATFORM_EC_TIMER   "${PLATFORM_EC}/common/timer.c")
 
+zephyr_sources_ifdef(CONFIG_PLATFORM_EC_USB_POWER_DELIVERY
+                                                "${PLATFORM_EC}/common/usb_common.c"
+                                                "${PLATFORM_EC}/common/usbc/usb_sm.c")
+zephyr_sources_ifdef(CONFIG_PLATFORM_EC_USBC_OCP
+                                                "${PLATFORM_EC}/common/usbc_ocp.c")
+zephyr_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_DUAL_ROLE
+                                                "${PLATFORM_EC}/common/usb_pd_dual_role.c")
+zephyr_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_HOST_CMD
+                                                "${PLATFORM_EC}/common/usb_pd_host_cmd.c")
+
+zephyr_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_TCPMV2
+                                                "${PLATFORM_EC}/common/usbc/usb_sm.c"
+                                                "${PLATFORM_EC}/common/usbc/usbc_task.c")
+
+zephyr_sources_ifdef(CONFIG_PLATFORM_EC_USB_VPD "${PLATFORM_EC}/common/usbc/usb_tc_vpd_sm.c")
+zephyr_sources_ifdef(CONFIG_PLATFORM_EC_USB_CTVPD
+                                                "${PLATFORM_EC}/common/usbc/usb_tc_ctvpd_sm.c")
+zephyr_sources_ifdef(CONFIG_PLATFORM_EC_USB_DRP_ACC_TRYSRC
+                                                "${PLATFORM_EC}/common/usbc/usb_tc_drp_acc_trysrc_sm.c"
+                                                "${PLATFORM_EC}/common/usbc/usb_pe_drp_sm.c"
+                                                "${PLATFORM_EC}/common/usbc/usb_pd_dpm.c"
+                                                "${PLATFORM_EC}/common/usbc/dp_alt_mode.c")
+
+zephyr_sources_ifdef(CONFIG_PLATFORM_EC_USB_PRL_SM
+                                                "${PLATFORM_EC}/common/usbc/usb_prl_sm.c")
+
+zephyr_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_TCPM_TUSB422
+                                                "${PLATFORM_EC}/driver/tcpm/tusb422.c")
+zephyr_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_TCPM_TCPCI
+                                                "${PLATFORM_EC}/driver/tcpm/tcpci.c")
+
+zephyr_sources_ifdef(CONFIG_PLATFORM_EC_USBC_PPC
+                                                "${PLATFORM_EC}/common/usbc_ppc.c")
+zephyr_sources_ifdef(CONFIG_PLATFORM_EC_USBC_PPC_SN5S330
+                                                "${PLATFORM_EC}/driver/ppc/sn5s330.c")
+zephyr_sources_ifdef(CONFIG_PLATFORM_EC_USBC_PPC_SYV682X
+                                                "${PLATFORM_EC}/driver/ppc/syv682x.c")
+
 zephyr_sources_ifdef(CONFIG_SHELL               "${PLATFORM_EC}/common/gpio_commands.c")
diff --git a/zephyr/Kconfig b/zephyr/Kconfig
index 8e533f7718..4ef4dd3f34 100644
--- a/zephyr/Kconfig
+++ b/zephyr/Kconfig
@@ -15,6 +15,7 @@ if PLATFORM_EC
 rsource "Kconfig.battery"
 rsource "Kconfig.powerseq"
 rsource "Kconfig.tasks"
+rsource "Kconfig.usbc"
 
 # Below is a hack to use CONFIG_ZEPHYR in platform/ec code before
 # config.h has been included.  There is some tricky ordering in some
diff --git a/zephyr/Kconfig.usbc b/zephyr/Kconfig.usbc
new file mode 100644
index 0000000000..924349b6bc
--- /dev/null
+++ b/zephyr/Kconfig.usbc
@@ -0,0 +1,364 @@
+# Copyright 2020 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+config PLATFORM_EC_USBC
+	bool "Enable USB Type-C functionality"
+	default y
+	help
+	  Enable this to support various USB Type-C features chosen by the
+	  options below. USB-C is widely used on modern Chromebooks and the EC's
+	  role is to negotiate power contracts (for sourcing or sinking power
+	  over USB). The EC is also responsible for discovering the capabilities
+	  of attached USB-C partners and enabling alternate operational modes,
+	  including Display Port, Thunderbolt, and USB4.
+
+if PLATFORM_EC_USBC
+
+config PLATFORM_EC_USB_POWER_DELIVERY
+	bool "Enable support for USB Type-C Power Delivery"
+	default y
+	help
+	  USB has always provided basic power to an attached peripheral. USB-C
+	  PD is part of the USB 3.0 standard and allows a lot more functionality
+	  than the basic 500mA @ 5V. It allows negotiating power delivery over
+	  the USB cable to select voltages up to 20V with current up to 5A.
+
+	  This option also enables the Type-C Port Manager (TCPM) on the EC. The
+	  TCPM deals with the various state changes in the system as devices are
+	  plugged and unplugged, as well as changes in power requirements from
+	  those devices.
+
+config PLATFORM_EC_CHARGE_MANAGER
+	bool "Enable the charge manager"
+	default y
+	help
+	  The EC charge manager manages charging the battery from all supported
+	  power sources.  This includes dedicated charge ports (such as a
+	  barrel jack connector), BC1.2 (Battery Charging 1.2) sources, and
+	  USB-C sources. When multiple charge sources are connected to a
+	  Chromebook simultaneously, the charge manager is responsible for
+	  picking the best source.
+
+	  Note that the charge manager assumes that at least one USB-C power
+	  source is available on the hardware, so cannot be built without
+	  PLATFORM_EC_USBC.
+
+config PLATFORM_EC_CHARGER_INPUT_CURRENT
+	int "Charger input current in mA"
+	default 512
+	help
+	  This is the default input current for the board in mA.  Many boards
+	  also use this as the least maximum input current during transients.
+
+	  This value should depend on external power adapter, designed charging
+	  voltage, and the maximum power of the running system. For type-C
+	  chargers, this should be set to 512 mA in order to not brown-out
+	  low-current USB charge ports in accordance with USB-PD r3.0 Sec. 7.3
+
+config PLATFORM_EC_USBC_OCP
+	bool
+	help
+	  USB-C overcurrent protection: Enable this to detect when a connected
+	  USB-C partner draws too much power from the Chromebook and
+	  automatically shut off power to the USB-C partner.
+
+	  This should be enabled by drivers which can detect over-current. It
+	  cannot be set otherwise, even in prj.conf
+
+config PLATFORM_EC_USB_PD_HOST_CMD
+	bool "Enable host commands related to USB Power Delivery"
+	default y
+	help
+	  This enables host commands which allow finding out the capabilities
+	  of USB PD, checking is status and controlling how it operates. For
+	  devices which support firmware update, this is provided as well,
+	  with the firmware being sent from the AP.
+
+config PLATFORM_EC_USB_PD_PORT_MAX_COUNT
+	int "Maximum number of USB PD ports supported"
+	default 2
+	help
+	  This sets the limit on the number of PD ports supported on the
+	  device. This is used to set the size for tables used by devices.
+
+	  TODO(b/176237074): Can we calculate this from the devicetree at some
+	  point? Or update the sn5S330 driver to use an 8-bit flag byte for
+	  source_enabled[] so that plenty of ports are supported without this
+	  configuration option?
+
+choice "Measuring VBUS voltage"
+	prompt "Select how VBUS voltage is measured"
+
+config PLATFORM_EC_USB_PD_VBUS_MEASURE_NOT_PRESENT
+	bool "VBUS voltage cannot be read"
+	help
+	  Enable this if the board does not provide any mechanism for the EC to
+	  read the analog VBUS voltage.
+
+config PLATFORM_EC_USB_PD_VBUS_MEASURE_CHARGER
+	bool "On-board charger supports VBUS measurement"
+	help
+	  Enable this if the VBUS voltage can be read using a charger on the
+	  board.
+
+config PLATFORM_EC_USB_PD_VBUS_MEASURE_TCPC
+	bool "Type-C Port Controller supports VBUS measurement"
+	help
+	  Enable this if the VBUS voltage can be read using the on-board
+	  TCPC.
+
+config PLATFORM_EC_USB_PD_VBUS_MEASURE_ADC_EACH_PORT
+	bool "VBUS on each port is measured using an ADC channel"
+	help
+	  Enable this is there is a separate ADC channel for each USB-C VBUS
+	  voltage.
+
+endchoice  # Measuring VBUS voltage
+
+config PLATFORM_EC_USB_PD_DUAL_ROLE
+	bool "Board can act as a dual-role Power Delivery port"
+	default y
+	help
+	  This enables support for switching between source and sink during
+	  operation. This means that the port can accept power (e.g. to charge
+	  up its battery), or send out power to an attached device on the same
+	  port.
+
+config PLATFORM_EC_USB_PD_DUAL_ROLE_AUTO_TOGGLE
+	bool "Board can use TCPC-controlled DRP toggle"
+	depends on PLATFORM_EC_USB_PD_DUAL_ROLE
+	default y
+	help
+	  Enable this if the USB Type-C Port Controllers (TCPC) used on the
+	  board supports toggling of the power role autonomously. When this is
+	  disabled, the USB power delivery task is responsible for manually
+	  toggling the power role.
+
+config PLATFORM_EC_USB_PD_DISCHARGE
+	bool "Board can discharge VBUS"
+	default y
+	help
+	  Enable this if the board can enable VBUS discharge (eg. through a
+	  GPIO-controlled discharge circuit, or through port controller
+	  registers) to discharge VBUS rapidly on disconnect
+
+choice "Discharge method"
+	prompt "Select the discharge method"
+	depends on PLATFORM_EC_USB_PD_DISCHARGE
+
+config PLATFORM_EC_USB_PD_DISCHARGE_GPIO
+	bool "GPIO control"
+	help
+	  Enable this if the discharge circuit is controlled by a GPIO
+
+	  TODO: How to specify the GPIO?
+
+config PLATFORM_EC_USB_PD_DISCHARGE_TCPC
+	bool "Discharge circuit is provided by the TCPC"
+	help
+	  Enable this if the discharge circuit is provided by Power-Delivery
+	  resistors on the USB Type-C Port Controller (TCPC).
+
+config PLATFORM_EC_USB_PD_DISCHARGE_PPC
+	bool "Discharge circuit is provided by the PPC"
+	help
+	  Enable this if the discharge circuit is using Power Delivery
+	  resistors on the Power Path Controller.
+
+endchoice  # Discharge method
+
+if  PLATFORM_EC_USB_POWER_DELIVERY
+
+config PLATFORM_EC_CONFIG_USB_PD_REV30
+	bool "Enable USB PD Rev3.0 functionality"
+	default y
+	help
+	  Enable this to allow Rev3.0 functionality, including features such as
+	  Fast Role Swap, advertising the available power across all ports of a
+	  multi-port charger, and USB4. If disabled, only USB Power Delivery
+	  Rev2.0 functionality is supported.
+
+	  This defaults to y because PD Rev3.0 is required for USB4
+	  functionality.
+
+choice "VBUS detection method"
+	prompt "Select the method to detect VBUS"
+
+config PLATFORM_EC_USB_PD_VBUS_DETECT_TCPC
+	bool "TCPC detects VBUS"
+	help
+	  Choose this option if the TCPC can detect the presence of VBUS
+
+config PLATFORM_EC_USB_PD_VBUS_DETECT_CHARGER
+	bool "Charger detects VBUS"
+	help
+	  Choose this option if the battery charger can detect the presence
+	  of VBUS
+
+config PLATFORM_EC_USB_PD_VBUS_DETECT_PPC
+	bool "PPC detects VBUS"
+	help
+	  Choose this option if the Power-Path Controller (PPC) can detect the
+	  presence of VBUS
+
+config PLATFORM_EC_USB_PD_VBUS_DETECT_NONE
+	bool "No way to detect VBUS"
+	help
+	  Choose this option if it is not possible to detect VBUS.
+
+endchoice  # VBUS detection method
+
+config PLATFORM_EC_USB_TYPEC_SM
+	bool "Enable Type-C (TC) physical-layer state machine"
+	default y
+	help
+	  This enables the bottom layer of the TCPMv2 state machine which
+	  handles using CC lines to set the voltage-level of the power supplied.
+	  You should normally define this unless you want to override it in your
+	  board code, which is not recommended.
+
+config PLATFORM_EC_USB_PRL_SM
+	bool "Enable protocol layer (PRL) state machine"
+	default y
+	help
+	  This enables the middle layer of the power-delivery (PD) protocol,
+	  which deals with the flow of power messages across the USB Type-C
+	  interface. You should normally define this unless you want to override
+	  it in your board code, which is not recommended.
+
+config PLATFORM_EC_USB_PE_SM
+	bool "Enable policy engine (PE) state machine"
+	default y
+	help
+	  This enables the top layer of the power-delivery (PD) protocol, which
+	  deals with the actually PD messages that are exchanged with attached
+	  USB devices. You should normally define this unless you want to
+	  override it in your board code, which is not recommended.
+
+config PLATFORM_EC_USB_PD_DECODE_SOP
+	def_bool y  # Required for TCPMV2
+	help
+	  This enables support for encoding of the message's Start Of Packet
+	  (SOP, SOP' and SOP'', collectively called SOP*) in bits 31-28 of the
+	  32-bit msg header type.
+
+choice "USB-C device type"
+	prompt "Select the USB-C device type"
+	default PLATFORM_EC_USB_DRP_ACC_TRYSRC
+
+config PLATFORM_EC_USB_VPD
+	bool "VCONN-Powered Device"
+	help
+	  This enables support for supplying power to devices that accept power
+	  over the USB VCONN line.
+
+	  See here for details:
+
+	  https://www.usb.org/sites/default/files/D1T2-3a%20-%20CTVPDs%20and%20Making%20Your%20Own%20USB-C%20Thingamajig.pdf
+
+config PLATFORM_EC_USB_CTVPD
+	bool "Charge-Through VCONN-Powered Device"
+	help
+	  This enables support for supplying power to devices, with a circuit
+	  that deals with this without needing the involvement of the main
+	  device.
+
+config PLATFORM_EC_USB_DRP_ACC_TRYSRC
+	bool "Dual-Role Port, Audio Accessory, and Try.SRC Device"
+	help
+	  This is the most flexible option, allowing the port to operate in
+	  a dual-role capacity, so that power can be accepted or supplied on
+	  a port.
+
+endchoice  # USB-C device type
+
+endif  # PLATFORM_EC_USB_POWER_DELIVERY
+
+config PLATFORM_EC_USBC_PPC
+	bool "Enable support for USB Type-C Power Path Controller"
+	default y
+	help
+	  Enable this to support the USB Type-C PPC on your board. This enables
+	  common routines for things like figuring out whether power is being
+	  supplied to the Chromebook over USB-C, whether the Chromebook is
+	  supplying power to another device, etc.
+
+if PLATFORM_EC_USBC_PPC
+
+config PLATFORM_EC_USBC_PPC_SN5S330
+	bool "Support the TI SN5S330 PD 3.0 power mux"
+	select PLATFORM_EC_USBC_OCP
+	help
+	  This is a USB Type-C Power Delivery 3.0 Bidirectional Power Mux with
+	  CC and SBU short-to-VBUS Protection and Integrated Dead Battery
+	  LDO. This chips provides protection against pins shorting to Vbus as
+	  well as ESD (Electostatic discharge) protection. It provides a simple
+	  I2C interface for for Mode Selection, Fast Role Swap, and Fault
+	  Reporting.
+
+config PLATFORM_EC_USBC_PPC_SYV682X
+	bool "Support the SYV682X which is some kind of chip"
+	select PLATFORM_EC_USBC_OCP
+	help
+	  The SYV682A is a 2 to 1 power mux switch for USB PD applications. The
+	  SYV682A supports dead battery wake up function and Fast Role Swap
+	  features. It provides protection against overcurrent, overvoltage,
+	  thermal shutdown, and undervoltage conditions.
+
+config PLATFORM_EC_USB_PD_TCPM_TUSB422
+	bool "Support the TI TUSB422 Port Control with USB PD"
+	help
+	  This is a a USB PD PHY that enables a USB Type-C port with the
+	  Configuration Channel (CC) logic needed for USB Type-C ecosystems. It
+	  integrates the physical layer of the USB BMC power delivery (PD)
+	  protocol to allow up to 100-W of power and support for alternate mode
+	  interfaces. An external microprocessor, containing USB Type-C Port
+	  Manager (TCPM), communicates with the TUSB422 through an I2C
+	  interface.
+
+choice "Type-C Port Manager (TCPM)"
+	prompt "Choose a Type-C Port Manager (TCPM) to manage TCPC"
+
+config PLATFORM_EC_USB_PD_TCPM_TCPCI
+	bool "Use TCPCI"
+	help
+	  Enable a TCPC compatible with the Type-C Port Controller Interface
+	  (TCPCI) Specification. This driver supports both Rev1 v1.2 and Rev2
+	  v1.0 of the TCPCI specification. Select this driver directly only
+	  if your specific TCPC chip is not listed as a separate config option.
+
+	  Note: most of the TCPC will depend on PLATFORM_EC_USB_PD_TCPM_TCPCI.
+
+# TODO: Add other choices:
+#  CONFIG_USB_PD_TCPM_STUB
+#  CONFIG_USB_PD_TCPM_FUSB302
+#  CONFIG_USB_PD_TCPM_ITE_ON_CHIP
+#  CONFIG_USB_PD_TCPM_ANX3429
+#  CONFIG_USB_PD_TCPM_ANX740X
+#  CONFIG_USB_PD_TCPM_ANX741X
+#  CONFIG_USB_PD_TCPM_ANX7447
+#  CONFIG_USB_PD_TCPM_ANX7688
+#  CONFIG_USB_PD_TCPM_NCT38XX
+#  CONFIG_USB_PD_TCPM_MT6370
+#  CONFIG_USB_PD_TCPM_TUSB422
+#  CONFIG_USB_PD_TCPM_RAA489000
+#  CONFIG_USB_PD_TCPM_RT1715
+#  CONFIG_USB_PD_TCPM_FUSB307
+#  CONFIG_USB_PD_TCPM_STM32GX
+
+endchoice  # Type-C Port Manager (TCPM)
+
+config PLATFORM_EC_CONSOLE_CMD_PPC_DUMP
+	bool "Enable ppc_dump command"
+	depends on PLATFORM_EC_USBC_PPC
+	default y
+
+config PLATFORM_EC_CMD_TCPC_DUMP
+	bool "Enable tcpi_dump command"
+	default y
+	# TODO: depends on ??
+
+endif  # PLATFORM_EC_USBC_PPC
+
+endif  # PLATFORM_EC_USBC
diff --git a/zephyr/shim/include/config_chip.h b/zephyr/shim/include/config_chip.h
index fba6b07847..1dacf839a5 100644
--- a/zephyr/shim/include/config_chip.h
+++ b/zephyr/shim/include/config_chip.h
@@ -151,4 +151,184 @@ enum battery_type {
 
 #endif  /* CONFIG_PLATFORM_EC_TIMER */
 
+/* USB-C things */
+#ifdef CONFIG_PLATFORM_EC_USBC
+
+/* Zephyr only supports v2 so we always define this */
+#define CONFIG_USB_PD_TCPMV2
+
+/*
+ * Define these here for now. They are not actually CONFIG options in the EC
+ * code base. Ideally they would be defined in the devicetree (perhaps for a
+ * 'board' driver if not in the USB chip driver itself).
+ *
+ * SN5S30 PPC supports up to 24V VBUS source and sink, however passive USB-C
+ * cables only support up to 60W.
+ */
+#define PD_OPERATING_POWER_MW	15000
+#define PD_MAX_POWER_MW		60000
+#define PD_MAX_CURRENT_MA	3000
+#define PD_MAX_VOLTAGE_MV	20000
+
+/* TODO: b/144165680 - measure and check these values on Volteer */
+#define PD_POWER_SUPPLY_TURN_ON_DELAY	30000 /* us */
+#define PD_POWER_SUPPLY_TURN_OFF_DELAY	30000 /* us */
+#define PD_VCONN_SWAP_DELAY		5000 /* us */
+#endif
+
+#undef CONFIG_CMD_PPC_DUMP
+#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_PPC_DUMP
+#define CONFIG_CMD_PPC_DUMP
+#endif
+
+#undef CONFIG_CMD_TCPC_DUMP
+#ifdef CONFIG_PLATFORM_EC_CMD_TCPC_DUMP
+#define CONFIG_CMD_TCPC_DUMP
+#endif
+
+#undef CONFIG_USB_POWER_DELIVERY
+#ifdef CONFIG_PLATFORM_EC_USB_POWER_DELIVERY
+#define CONFIG_USB_POWER_DELIVERY
+#endif
+
+#undef CONFIG_CHARGER
+#undef CONFIG_CHARGE_MANAGER
+#ifdef CONFIG_PLATFORM_EC_CHARGE_MANAGER
+#define CONFIG_CHARGE_MANAGER
+#define CONFIG_CHARGER
+
+/* TODO: Put these charger defines in the devicetree? */
+#define CONFIG_CHARGER_SENSE_RESISTOR		10
+#define CONFIG_CHARGER_SENSE_RESISTOR_AC	10
+
+#endif
+
+#undef CONFIG_CHARGER_INPUT_CURRENT
+#ifdef CONFIG_PLATFORM_EC_CHARGER_INPUT_CURRENT
+#define CONFIG_CHARGER_INPUT_CURRENT	CONFIG_PLATFORM_EC_CHARGER_INPUT_CURRENT
+#endif
+
+/* VBUS-voltage measurement */
+#undef CONFIG_USB_PD_VBUS_MEASURE_NOT_PRESENT
+#undef CONFIG_USB_PD_VBUS_MEASURE_CHARGER
+#undef CONFIG_USB_PD_VBUS_MEASURE_TCPC
+#undef CONFIG_USB_PD_VBUS_MEASURE_ADC_EACH_PORT
+#ifdef CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_NOT_PRESENT
+#define CONFIG_USB_PD_VBUS_MEASURE_NOT_PRESENT
+#elif defined(CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_CHARGER)
+#define CONFIG_USB_PD_VBUS_MEASURE_CHARGER
+#elif defined(CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_TCPC)
+#define CONFIG_USB_PD_VBUS_MEASURE_TCPC
+#elif defined(CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_ADC_EACH_PORT)
+#define CONFIG_USB_PD_VBUS_MEASURE_ADC_EACH_PORT
+#endif /* VBUS-voltage measurement */
+
+#undef CONFIG_EC_USB_PD_DUAL_ROLE
+#ifdef CONFIG_PLATFORM_EC_USB_PD_DUAL_ROLE
+#define CONFIG_EC_USB_PD_DUAL_ROLE
+#endif
+
+#undef CONFIG_EC_USB_PD_DUAL_ROLE_AUTO_TOGGLE
+#ifdef CONFIG_PLATFORM_EC_USB_PD_DUAL_ROLE_AUTO_TOGGLE
+#define CONFIG_EC_USB_PD_DUAL_ROLE_AUTO_TOGGLE
+#endif
+
+#undef CONFIG_USB_PD_DISCHARGE_PPC
+#ifdef CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC
+#define CONFIG_USB_PD_DISCHARGE_PPC
+#endif
+
+#undef CONFIG_USBC_OCP
+#ifdef CONFIG_PLATFORM_EC_USBC_OCP
+#define CONFIG_USBC_OCP
+#endif
+
+#undef CONFIG_USB_PD_HOST_CMD
+#ifdef CONFIG_PLATFORM_EC_USB_PD_HOST_CMD
+#define CONFIG_USB_PD_HOST_CMD
+#endif
+
+#undef CONFIG_CONFIG_USB_PD_REV30
+#ifdef CONFIG_PLATFORM_EC_CONFIG_USB_PD_REV30
+#define CONFIG_CONFIG_USB_PD_REV30
+#endif
+
+#undef CONFIG_USB_PD_VBUS_DETECT_TCPC
+#undef CONFIG_USB_PD_VBUS_DETECT_CHARGER
+#undef CONFIG_USB_PD_VBUS_DETECT_GPIO
+#undef CONFIG_USB_PD_VBUS_DETECT_PPC
+#undef CONFIG_USB_PD_VBUS_DETECT_NONE
+#ifdef CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_TCPC
+#define CONFIG_USB_PD_VBUS_DETECT_TCPC
+#endif
+#ifdef CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_CHARGER
+#define CONFIG_USB_PD_VBUS_DETECT_CHARGER
+#endif
+#ifdef CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_PPC
+#define CONFIG_USB_PD_VBUS_DETECT_PPC
+#endif
+#ifdef CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_NONE
+#define CONFIG_USB_PD_VBUS_DETECT_NONE
+#endif
+
+#undef CONFIG_USB_TYPEC_SM
+#ifdef CONFIG_PLATFORM_EC_USB_TYPEC_SM
+#define CONFIG_USB_TYPEC_SM
+#endif
+
+#undef CONFIG_EC_USB_PRL_SM
+#ifdef CONFIG_PLATFORM_EC_USB_PRL_SM
+#define CONFIG_EC_USB_PRL_SM
+#endif
+
+#undef CONFIG_USB_PE_SM
+#ifdef CONFIG_PLATFORM_EC_USB_PE_SM
+#define CONFIG_USB_PE_SM
+#endif
+
+#undef CONFIG_USB_PD_DECODE_SOP
+#ifdef CONFIG_PLATFORM_EC_USB_PD_DECODE_SOP
+#define CONFIG_USB_PD_DECODE_SOP
+#endif
+
+#undef CONFIG_USB_VPD
+#ifdef CONFIG_PLATFORM_EC_USB_VPD
+#define CONFIG_USB_VPD
+#endif
+
+#undef CONFIG_USB_CTVPD
+#ifdef CONFIG_PLATFORM_EC_USB_CTVPD
+#define CONFIG_USB_CTVPD
+#endif
+
+#undef CONFIG_USB_DRP_ACC_TRYSRC
+#ifdef CONFIG_PLATFORM_EC_USB_DRP_ACC_TRYSRC
+#define CONFIG_USB_DRP_ACC_TRYSRC
+#endif
+
+#undef CONFIG_USB_PD_TCPM_TUSB422
+#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_TUSB422
+#define CONFIG_USB_PD_TCPM_TUSB422
+#endif
+
+#undef CONFIG_USB_PD_TCPM_TCPCI
+#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_TCPCI
+#define CONFIG_USB_PD_TCPM_TCPCI
+#endif
+
+#undef CONFIG_USB_PD_PORT_MAX_COUNT
+#ifdef CONFIG_PLATFORM_EC_USB_PD_PORT_MAX_COUNT
+#define CONFIG_USB_PD_PORT_MAX_COUNT CONFIG_PLATFORM_EC_USB_PD_PORT_MAX_COUNT
+#endif
+
+#undef CONFIG_USBC_PPC_SN5S330
+#ifdef CONFIG_PLATFORM_EC_USBC_PPC_SN5S330
+#define CONFIG_USBC_PPC_SN5S330
+#endif
+
+#undef CONFIG_USBC_PPC_SYV682X
+#ifdef CONFIG_PLATFORM_EC_USBC_PPC_SYV682X
+#define CONFIG_USBC_PPC_SYV682X
+#endif
+
 #endif  /* __CROS_EC_CONFIG_CHIP_H */