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| author | Gwendal Grignou <gwendal@chromium.org> | 2015-10-14 10:14:24 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2015-11-19 02:18:10 -0800 |
| commit | 2c8817117a8c736ab2ed52496af00824d9a12332 (patch) | |
| tree | 4652a1154e1579150dbe9e362d1741901a0526a2 | |
| parent | a45a65ce862db9661cd67f763606765b29e3d61c (diff) | |
| download | chrome-ec-2c8817117a8c736ab2ed52496af00824d9a12332.tar.gz | |
common: spi: Add a delay after write commands.
Some SPI slave devices need a delay to digest write commands. (BMI160).
Add a 1ms delay in the write command.
BRANCH=smaug
BUG=none
TEST=Check on the logic analyzer that there is ~1.5ms delay between back
to back spixfer w ... commands.
Change-Id: I7cc6ed0da9ae39550e58457b9431eb01b5ab36d8
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/305379
Reviewed-by: Alec Berg <alecaberg@chromium.org>
| -rw-r--r-- | common/spi_commands.c | 7 | ||||
| -rw-r--r-- | driver/accelgyro_bmi160.c | 6 |
2 files changed, 13 insertions, 0 deletions
diff --git a/common/spi_commands.c b/common/spi_commands.c index 7935bab216..46ce27ce92 100644 --- a/common/spi_commands.c +++ b/common/spi_commands.c @@ -9,6 +9,7 @@ #include "common.h" #include "console.h" #include "spi.h" +#include "timer.h" #include "util.h" static int command_spixfer(int argc, char **argv) @@ -52,6 +53,12 @@ static int command_spixfer(int argc, char **argv) uint8_t cmd[2] = { offset, v }; rv = spi_transaction(&spi_devices[dev_id], cmd, 2, NULL, 0); + + /* + * Some SPI device needs a delay before accepting other + * commands, otherwise the write might be ignored. + */ + msleep(1); } else { return EC_ERROR_PARAM1; } diff --git a/driver/accelgyro_bmi160.c b/driver/accelgyro_bmi160.c index 44900807cc..a9b869f02a 100644 --- a/driver/accelgyro_bmi160.c +++ b/driver/accelgyro_bmi160.c @@ -178,6 +178,12 @@ static int raw_write8(const int addr, const uint8_t reg, int data) reg, data); #endif } + /* + * From Bosch: BMI160 needs a delay of 450us after each write if it + * is in suspend mode, otherwise the operation may be ignored by + * the sensor. Given we are only doing write during init, add + * the delay inconditionally. + */ msleep(1); return rv; } |