diff options
author | Nick Sanders <nsanders@chromium.org> | 2015-12-21 13:55:59 -0800 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2016-03-16 16:19:53 -0700 |
commit | d3a8bd0c36bea7c33caecb72058b769170471fd1 (patch) | |
tree | 444cc3a74bae148ecd649edaae081ec5e11754ca | |
parent | a595a9cff1607a2b7290482beb6570fc84fe9bdc (diff) | |
download | chrome-ec-d3a8bd0c36bea7c33caecb72058b769170471fd1.tar.gz |
servo_micro: add initial servo_micro build
* Update flash_ec to allow flashing servo_micro
* Add servo_micro build
BUG=chromium:571477
BRANCH=None
TEST=updated servod is able to control gpio, gpio extender,
SPI flash, ec uart, ap uart on test yoshi
Signed-off-by: Nick Sanders <nsanders@google.com>
Change-Id: I4d69c83ae581cb41da928a27c39b7152475d7ca8
Reviewed-on: https://chromium-review.googlesource.com/327214
Commit-Ready: Nick Sanders <nsanders@chromium.org>
Tested-by: Nick Sanders <nsanders@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
l--------- | board/servo_micro/Makefile | 1 | ||||
-rw-r--r-- | board/servo_micro/board.c | 261 | ||||
-rw-r--r-- | board/servo_micro/board.h | 103 | ||||
-rw-r--r-- | board/servo_micro/build.mk | 13 | ||||
-rw-r--r-- | board/servo_micro/ec.tasklist | 21 | ||||
-rw-r--r-- | board/servo_micro/gpio.inc | 60 | ||||
-rwxr-xr-x | extra/usb_spi/stm32spi.py | 140 | ||||
-rwxr-xr-x | util/flash_ec | 4 |
8 files changed, 602 insertions, 1 deletions
diff --git a/board/servo_micro/Makefile b/board/servo_micro/Makefile new file mode 120000 index 0000000000..94aaae2c4d --- /dev/null +++ b/board/servo_micro/Makefile @@ -0,0 +1 @@ +../../Makefile
\ No newline at end of file diff --git a/board/servo_micro/board.c b/board/servo_micro/board.c new file mode 100644 index 0000000000..f22bda4342 --- /dev/null +++ b/board/servo_micro/board.c @@ -0,0 +1,261 @@ +/* Copyright 2016 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +/* Servo micro board configuration */ + +#include "common.h" +#include "ec_version.h" +#include "gpio.h" +#include "hooks.h" +#include "i2c.h" +#include "queue_policies.h" +#include "registers.h" +#include "spi.h" +#include "task.h" +#include "usart-stm32f0.h" +#include "usart_tx_dma.h" +#include "usart_rx_dma.h" +#include "usb_gpio.h" +#include "usb_i2c.h" +#include "usb_spi.h" +#include "usb-stream.h" +#include "util.h" + + +/****************************************************************************** + * Build GPIO tables and expose a subset of the GPIOs over USB. + */ + +#include "gpio_list.h" + +static enum gpio_signal const usb_gpio_list[] = { +GPIO_UART1_EN_L, +GPIO_SERVO_JTAG_TRST_L, +GPIO_SPI1_BUF_EN_L, +GPIO_SPI2_BUF_EN_L, +GPIO_UART2_EN_L, +GPIO_SPI1_VREF_33, +GPIO_SPI1_VREF_18, +GPIO_SPI2_VREF_33, +GPIO_SPI2_VREF_18, +GPIO_SERVO_JTAG_TRST_DIR, +GPIO_SERVO_JTAG_TDI_DIR, +GPIO_TCA6416_RESET_L +}; + +/* + * This instantiates struct usb_gpio_config const usb_gpio, plus several other + * variables, all named something beginning with usb_gpio_ + */ +USB_GPIO_CONFIG(usb_gpio, + usb_gpio_list, + USB_IFACE_GPIO, + USB_EP_GPIO); + + +/****************************************************************************** + * Forward UARTs as a USB serial interface. + */ + +#define USB_STREAM_RX_SIZE 16 +#define USB_STREAM_TX_SIZE 16 + +/****************************************************************************** + * Forward USART2 as a simple USB serial interface. + */ + +static struct usart_config const usart2; +struct usb_stream_config const usart2_usb; + +static struct queue const usart2_to_usb = QUEUE_DIRECT(64, uint8_t, + usart2.producer, usart2_usb.consumer); +static struct queue const usb_to_usart2 = QUEUE_DIRECT(64, uint8_t, + usart2_usb.producer, usart2.consumer); + +static struct usart_config const usart2 = + USART_CONFIG(usart2_hw, + usart_rx_interrupt, + usart_tx_interrupt, + 115200, + usart2_to_usb, + usb_to_usart2); + +USB_STREAM_CONFIG(usart2_usb, + USB_IFACE_USART2_STREAM, + USB_STR_USART2_STREAM_NAME, + USB_EP_USART2_STREAM, + USB_STREAM_RX_SIZE, + USB_STREAM_TX_SIZE, + usb_to_usart2, + usart2_to_usb) + + +/****************************************************************************** + * Forward USART3 as a simple USB serial interface. + */ + +static struct usart_config const usart3; +struct usb_stream_config const usart3_usb; + +static struct queue const usart3_to_usb = QUEUE_DIRECT(64, uint8_t, + usart3.producer, usart3_usb.consumer); +static struct queue const usb_to_usart3 = QUEUE_DIRECT(64, uint8_t, + usart3_usb.producer, usart3.consumer); + +static struct usart_config const usart3 = + USART_CONFIG(usart3_hw, + usart_rx_interrupt, + usart_tx_interrupt, + 115200, + usart3_to_usb, + usb_to_usart3); + +USB_STREAM_CONFIG(usart3_usb, + USB_IFACE_USART3_STREAM, + USB_STR_USART3_STREAM_NAME, + USB_EP_USART3_STREAM, + USB_STREAM_RX_SIZE, + USB_STREAM_TX_SIZE, + usb_to_usart3, + usart3_to_usb) + + +/****************************************************************************** + * Forward USART4 as a simple USB serial interface. + */ + +static struct usart_config const usart4; +struct usb_stream_config const usart4_usb; + +static struct queue const usart4_to_usb = QUEUE_DIRECT(64, uint8_t, + usart4.producer, usart4_usb.consumer); +static struct queue const usb_to_usart4 = QUEUE_DIRECT(64, uint8_t, + usart4_usb.producer, usart4.consumer); + +static struct usart_config const usart4 = + USART_CONFIG(usart4_hw, + usart_rx_interrupt, + usart_tx_interrupt, + 115200, + usart4_to_usb, + usb_to_usart4); + +USB_STREAM_CONFIG(usart4_usb, + USB_IFACE_USART4_STREAM, + USB_STR_USART4_STREAM_NAME, + USB_EP_USART4_STREAM, + USB_STREAM_RX_SIZE, + USB_STREAM_TX_SIZE, + usb_to_usart4, + usart4_to_usb) + + +/****************************************************************************** + * Define the strings used in our USB descriptors. + */ + +const void *const usb_strings[] = { + [USB_STR_DESC] = usb_string_desc, + [USB_STR_VENDOR] = USB_STRING_DESC("Google Inc."), + [USB_STR_PRODUCT] = USB_STRING_DESC("Servo Micro"), + [USB_STR_SERIALNO] = USB_STRING_DESC("1234-a"), + [USB_STR_VERSION] = USB_STRING_DESC(CROS_EC_VERSION32), + [USB_STR_USART4_STREAM_NAME] = USB_STRING_DESC("Servo UART3"), + [USB_STR_CONSOLE_NAME] = USB_STRING_DESC("Servo EC Shell"), + [USB_STR_USART3_STREAM_NAME] = USB_STRING_DESC("Servo UART2"), + [USB_STR_USART2_STREAM_NAME] = USB_STRING_DESC("Servo UART1"), +}; + +BUILD_ASSERT(ARRAY_SIZE(usb_strings) == USB_STR_COUNT); + + +/****************************************************************************** + * Support SPI bridging over USB, this requires usb_spi_board_enable and + * usb_spi_board_disable to be defined to enable and disable the SPI bridge. + */ + +/* SPI devices */ +/* Set clock divider to 7 since our SPI routing is non-optimal. */ +const struct spi_device_t spi_devices[] = { + { CONFIG_SPI_FLASH_PORT, 7, GPIO_SPI_CS}, +}; +const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices); + +void usb_spi_board_enable(struct usb_spi_config const *config) +{ + /* Remap SPI2 to DMA channels 6 and 7 */ + /* STM32F072 SPI2 defaults to using DMA channels 4 and 5 */ + /* but cros_ec hardcodes a 6/7 assumption in registers.h */ + STM32_SYSCFG_CFGR1 |= (1 << 24); + + /* Configure SPI GPIOs */ + gpio_config_module(MODULE_SPI_FLASH, 1); + + /* Set all four SPI pins to high speed */ + STM32_GPIO_OSPEEDR(GPIO_B) |= 0xff000000; + + /* Enable clocks to SPI2 module */ + STM32_RCC_APB1ENR |= STM32_RCC_PB1_SPI2; + + /* Reset SPI2 */ + STM32_RCC_APB1RSTR |= STM32_RCC_PB1_SPI2; + STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2; + + spi_enable(CONFIG_SPI_FLASH_PORT, 1); +} + +void usb_spi_board_disable(struct usb_spi_config const *config) +{ + spi_enable(CONFIG_SPI_FLASH_PORT, 0); + + /* Disable clocks to SPI2 module */ + STM32_RCC_APB1ENR &= ~STM32_RCC_PB1_SPI2; + + /* Release SPI GPIOs */ + gpio_config_module(MODULE_SPI_FLASH, 0); +} + +USB_SPI_CONFIG(usb_spi, USB_IFACE_SPI, USB_EP_SPI); + + +/****************************************************************************** + * Support I2C bridging over USB, this requires usb_i2c_board_enable and + * usb_i2c_board_disable to be defined to enable and disable the SPI bridge. + */ + +/* I2C ports */ +const struct i2c_port_t i2c_ports[] = { + {"master", I2C_PORT_MASTER, 100, + GPIO_MASTER_I2C_SCL, GPIO_MASTER_I2C_SDA}, +}; +const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); + +USB_I2C_CONFIG(usb_i2c, USB_IFACE_I2C, USB_EP_I2C); + + +/****************************************************************************** + * Initialize board. + */ +static void board_init(void) +{ + /* USB to serial queues */ + queue_init(&usart2_to_usb); + queue_init(&usb_to_usart2); + queue_init(&usart3_to_usb); + queue_init(&usb_to_usart3); + queue_init(&usart4_to_usb); + queue_init(&usb_to_usart4); + + /* UART init */ + usart_init(&usart2); + usart_init(&usart3); + usart_init(&usart4); + + /* Enable GPIO expander. */ + gpio_set_level(GPIO_TCA6416_RESET_L, 1); + + /* Structured enpoints */ + usb_spi_enable(&usb_spi, 1); +} +DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); diff --git a/board/servo_micro/board.h b/board/servo_micro/board.h new file mode 100644 index 0000000000..810fecb60a --- /dev/null +++ b/board/servo_micro/board.h @@ -0,0 +1,103 @@ +/* Copyright 2016 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Servo micro configuration */ + +#ifndef __CROS_EC_BOARD_H +#define __CROS_EC_BOARD_H + +/* 48 MHz SYSCLK clock frequency */ +#define CPU_CLOCK 48000000 + +/* Enable USART1,3,4 and USB streams */ +#define CONFIG_STREAM_USART +#define CONFIG_STREAM_USART2 +#define CONFIG_STREAM_USART3 +#define CONFIG_STREAM_USART4 +#define CONFIG_STREAM_USB +#define CONFIG_CMD_USART_INFO + +/* The UART console is on USART1 (PA9/PA10) */ +#undef CONFIG_UART_CONSOLE +#define CONFIG_UART_CONSOLE 1 + +/* Optional features */ +#define CONFIG_STM_HWTIMER32 +#define CONFIG_HW_CRC + +/* USB Configuration */ +#define CONFIG_USB +#define CONFIG_USB_PID 0x501a +#define CONFIG_USB_CONSOLE + +/* USB interface indexes (use define rather than enum to expand them) */ +#define USB_IFACE_USART4_STREAM 0 +#define USB_IFACE_GPIO 1 +#define USB_IFACE_SPI 2 +#define USB_IFACE_CONSOLE 3 +#define USB_IFACE_I2C 4 +#define USB_IFACE_USART3_STREAM 5 +#define USB_IFACE_USART2_STREAM 6 +#define USB_IFACE_COUNT 7 + +/* USB endpoint indexes (use define rather than enum to expand them) */ +#define USB_EP_CONTROL 0 +#define USB_EP_USART4_STREAM 1 +#define USB_EP_GPIO 2 +#define USB_EP_SPI 3 +#define USB_EP_CONSOLE 4 +#define USB_EP_I2C 5 +#define USB_EP_USART3_STREAM 6 +#define USB_EP_USART2_STREAM 7 +#define USB_EP_COUNT 8 + +/* Enable control of GPIOs over USB */ +#define CONFIG_USB_GPIO + +/* Enable control of SPI over USB */ +#define CONFIG_USB_SPI +#define CONFIG_SPI_MASTER +#define CONFIG_SPI_FLASH_PORT 0 /* First SPI master port */ + +/* This is not actually an EC so disable some features. */ +#undef CONFIG_WATCHDOG_HELP +#undef CONFIG_LID_SWITCH + +/* Enable control of I2C over USB */ +#define CONFIG_USB_I2C +#define CONFIG_I2C +#define CONFIG_I2C_MASTER +#define I2C_PORT_MASTER 0 + +/* + * Allow dangerous commands all the time, since we don't have a write protect + * switch. + */ +#define CONFIG_SYSTEM_UNLOCKED + +#ifndef __ASSEMBLER__ + +/* Timer selection */ +#define TIM_CLOCK32 2 + +#include "gpio_signal.h" + +/* USB string indexes */ +enum usb_strings { + USB_STR_DESC = 0, + USB_STR_VENDOR, + USB_STR_PRODUCT, + USB_STR_SERIALNO, + USB_STR_VERSION, + USB_STR_USART4_STREAM_NAME, + USB_STR_CONSOLE_NAME, + USB_STR_USART3_STREAM_NAME, + USB_STR_USART2_STREAM_NAME, + + USB_STR_COUNT +}; + +#endif /* !__ASSEMBLER__ */ +#endif /* __CROS_EC_BOARD_H */ diff --git a/board/servo_micro/build.mk b/board/servo_micro/build.mk new file mode 100644 index 0000000000..0e069a31ad --- /dev/null +++ b/board/servo_micro/build.mk @@ -0,0 +1,13 @@ +# -*- makefile -*- +# Copyright 2016 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Board specific files build + +# the IC is STmicro STM32F072RBT6 +CHIP:=stm32 +CHIP_FAMILY:=stm32f0 +CHIP_VARIANT:=stm32f07x + +board-y=board.o diff --git a/board/servo_micro/ec.tasklist b/board/servo_micro/ec.tasklist new file mode 100644 index 0000000000..1944ef3874 --- /dev/null +++ b/board/servo_micro/ec.tasklist @@ -0,0 +1,21 @@ +/* Copyright 2016 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * List of enabled tasks in the priority order + * + * The first one has the lowest priority. + * + * For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and + * TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries, + * where : + * 'n' in the name of the task + * 'r' in the main routine of the task + * 'd' in an opaque parameter passed to the routine at startup + * 's' is the stack size in bytes; must be a multiple of 8 + */ +#define CONFIG_TASK_LIST \ + TASK_ALWAYS(HOOKS, hook_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(CONSOLE, console_task, NULL, TASK_STACK_SIZE) diff --git a/board/servo_micro/gpio.inc b/board/servo_micro/gpio.inc new file mode 100644 index 0000000000..cca65d857d --- /dev/null +++ b/board/servo_micro/gpio.inc @@ -0,0 +1,60 @@ +/* -*- mode:c -*- + * + * Copyright 2016 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Outputs */ +GPIO(UART1_EN_L, PIN(A, 8), GPIO_OUT_HIGH) +GPIO(SERVO_JTAG_TRST_L, PIN(A, 13), GPIO_OUT_LOW) +GPIO(SPI1_BUF_EN_L, PIN(A, 14), GPIO_OUT_HIGH) +GPIO(SPI2_BUF_EN_L, PIN(A, 15), GPIO_OUT_HIGH) + +GPIO(UART2_EN_L, PIN(B, 0), GPIO_OUT_HIGH) +GPIO(SPI1_VREF_33, PIN(B, 2), GPIO_OUT_LOW) +GPIO(SPI1_VREF_18, PIN(B, 3), GPIO_OUT_LOW) +GPIO(SPI2_VREF_33, PIN(B, 4), GPIO_OUT_LOW) +GPIO(SPI2_VREF_18, PIN(B, 5), GPIO_OUT_LOW) +GPIO(SERVO_JTAG_TRST_DIR, PIN(B, 6), GPIO_OUT_HIGH) +GPIO(SERVO_JTAG_TDI_DIR, PIN(B, 7), GPIO_OUT_HIGH) + +GPIO(TCA6416_RESET_L, PIN(C, 13), GPIO_OUT_LOW) +GPIO(SERVO_JTAG_TMS_DIR, PIN(C, 14), GPIO_OUT_LOW) +GPIO(SERVO_JTAG_TDO_SEL, PIN(C, 15), GPIO_OUT_LOW) + +/* Inputs */ +GPIO(SERVO_JTAG_TMS, PIN(A, 4), GPIO_INPUT) +GPIO(SERVO_JTAG_TCK, PIN(A, 5), GPIO_INPUT) +GPIO(SERVO_JTAG_MUX_TDO, PIN(A, 6), GPIO_INPUT) +GPIO(SERVO_JTAG_TDI, PIN(A, 7), GPIO_INPUT) + +GPIO(SERVO_JTAG_RTCK, PIN(B, 1), GPIO_INPUT) + +/* Flash SPI interface */ +GPIO(SPI_CS, PIN(B, 12), GPIO_OUT_HIGH) +GPIO(SPI_CLK, PIN(B, 13), GPIO_INPUT) +GPIO(SPI_MISO, PIN(B, 14), GPIO_INPUT) +GPIO(SPI_MOSI, PIN(B, 15), GPIO_INPUT) + +/* I2C pins should be configured as inputs until I2C module is */ +/* initialized. This will avoid driving the lines unintentionally.*/ +GPIO(MASTER_I2C_SCL, PIN(B, 8), GPIO_INPUT) +GPIO(MASTER_I2C_SDA, PIN(B, 9), GPIO_INPUT) + +/* Unimplemented signals since we are not an EC */ +UNIMPLEMENTED(ENTERING_RW) +UNIMPLEMENTED(WP_L) + +ALTERNATE(PIN_MASK(A, 0x0600), 1, MODULE_UART, 0) /* USART1: PA09/PA10 - Servo stm32 console UART*/ +ALTERNATE(PIN_MASK(A, 0x000C), 1, MODULE_USART, 0) /* USART2: PA2/PA3 - Servo UART1 */ +ALTERNATE(PIN_MASK(B, 0x0C00), 4, MODULE_USART, 0) /* USART3: PB10/PB11 - Servo UART2 */ +/* Servo UART3 (USART4) is broken on servo micro rev. 1 */ +// ALTERNATE(PIN_MASK(A, 0x0003), 4, MODULE_USART, 0) /* USART4: PA0/PA1 - Servo UART3 */ +/* Expose Servo UART3 as GPIOs for debugging. */ +GPIO(UART3_TX, PIN(A, 0), GPIO_INPUT) +GPIO(UART3_RX, PIN(A, 1), GPIO_INPUT) + +ALTERNATE(PIN_MASK(B, 0x0300), 1, MODULE_I2C, 0) /* I2C MASTER:PB8/9 GPIO_ODR_HIGH */ + +ALTERNATE(PIN_MASK(B, 0xE000), 0, MODULE_SPI_FLASH, 0) /* SPI: PB15 - PB12 MOSI, MISO, CLK, CS */ diff --git a/extra/usb_spi/stm32spi.py b/extra/usb_spi/stm32spi.py new file mode 100755 index 0000000000..ecd4edb8e9 --- /dev/null +++ b/extra/usb_spi/stm32spi.py @@ -0,0 +1,140 @@ +#!/usr/bin/python2 +# Copyright 2016 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + + +# Test program to access SPI via stm32 raiden debug spi. + +import usb +import usb.core +import usb.util + +class SSpiBus(object): + """SPI bus class to access devices on the bus. + + Usage: + bus = SSpiBus() + # read 1 byte from register(0x16) + bus.wr_rd([0x16], 1) + # write 2 bytes to register(0x20) + bus.wr_rd([0x20, 0x01, 0x02]) + + Instance Variables: + _dev: pyUSB device object + _read_ep: pyUSB read endpoint for this interface + _write_ep: pyUSB write endpoint for this interface + """ + def __init__(self, vendor=0x18d1, + product=0x501a, interface=2, serialname=None): + # Find the stm32. + dev = usb.core.find(idVendor=vendor, idProduct=product) + if dev is None: + raise Exception("SPI", "USB device not found") + + print "Found stm32: %04x:%04x" % (vendor, product) + self._dev = dev + + # Get an endpoint instance. + cfg = dev.get_active_configuration() + intf = usb.util.find_descriptor(cfg, bInterfaceNumber=interface) + self._intf = intf + print "InterfaceNumber: %s" % intf.bInterfaceNumber + + read_ep = usb.util.find_descriptor( + intf, + # match the first IN endpoint + custom_match=\ + lambda e: \ + usb.util.endpoint_direction(e.bEndpointAddress) == \ + usb.util.ENDPOINT_IN + ) + + self._read_ep = read_ep + print "Reader endpoint: 0x%x" % read_ep.bEndpointAddress + + write_ep = usb.util.find_descriptor( + intf, + # match the first OUT endpoint + custom_match=\ + lambda e: \ + usb.util.endpoint_direction(e.bEndpointAddress) == \ + usb.util.ENDPOINT_OUT + ) + + self._write_ep = write_ep + print "Writer endpoint: 0x%x" % write_ep.bEndpointAddress + + self.enable(True) + print "Set up stm32 spi" + + def enable(self, enable): + # USB_RIR_OUT = 0 | USB_TYPE_VENDOR = (0x02 << 5) | + # USB_RECIP_INTERFACE = 0x01 + bmRequestType = 0x41 + # USB_SPI_REQ_ENABLE = 0x0000, USB_SPI_REQ_DISABLE = 0x0001 + if enable: + bmRequest = 0x0 + else: + bmRequest = 0x1 + + print "ctrl_transfer(0x%x, 0x%x, 0, 0x%x, null)" % ( + bmRequestType, bmRequest, self._intf.bInterfaceNumber) + ret = self._dev.ctrl_transfer( + bmRequestType, bmRequest, 0, self._intf.bInterfaceNumber, '') + print "ctrl_transfer ret - %s" % ret + + + + + def wr_rd(self, write_list, read_count=None): + """Implements hdctools wr_rd() interface. + + This function writes byte values list to I2C device, then reads + byte values from the same device. + + Args: + write_list: list of output byte values [0~255]. + read_count: number of byte values to read from device. + + Interface: + write: [write_count, read_count, data ... ] + read: [data .. ] + """ + print "SSpi.wr_rd(write_list=%s, read_count=%s)" % ( + write_list, read_count) + + # Clean up args from python style to correct types. + write_length = 0 + if write_list: + write_length = len(write_list) + if not read_count: + read_count = 0 + + # Send wr_rd command to stm32. + cmd = [write_length, read_count] + write_list + print "WR: %s" % cmd + ret = self._write_ep.write(cmd, 100) + + print "RET: %s " % ret + + # Read back response if necessary. + bytesread = self._read_ep.read(read_count + 2, 1000) + print "BYTES: %s " % bytesread + + if len(bytesread) < 2: + raise Exception("SPI", "Read status failed.") + + print "STATUS: 0x%02x%02x" % (int(bytesread[1]), int(bytesread[0])) + return bytesread[2:] + + +def main(): + bus = SSpiBus() + # write 2 bytes to register(0x20) + bus.wr_rd([0x90, 0x00, 0x00, 0x00], 2) + # read 1 byte from register(0x16) + bus.wr_rd([0x9f], 3) + +if __name__ == "__main__": + main() diff --git a/util/flash_ec b/util/flash_ec index 9aa737ddab..90e4e435fd 100755 --- a/util/flash_ec +++ b/util/flash_ec @@ -54,7 +54,6 @@ BOARDS_STM32=( big blaze chell_pd - discovery glados_pd honeybuns jerry @@ -82,6 +81,9 @@ BOARDS_STM32_DFU=( dingdong hoho twinkie + discovery + servo_v4 + servo_micro ) BOARDS_NPCX_5M5G_JTAG=( |