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authorRandall Spangler <rspangler@chromium.org>2013-07-08 11:11:06 -0700
committerChromeBot <chrome-bot@google.com>2013-07-08 13:53:59 -0700
commit49799b827856bd911e6b86821a9ec95687c4ca78 (patch)
tree9d3cd08a308f54e67c504090a1f23d269db16def
parent4e31062449cce3a86cd855403c147213cdbd06cc (diff)
downloadchrome-ec-49799b827856bd911e6b86821a9ec95687c4ca78.tar.gz
stm32l: Fix flash_is_erased() detection
STM32L erases flash to 0, not 1, so we need a config value to indicate that. This speeds up flash erase on STM32L by not re-erasing already-erased blocks. BUG=chrome-os-partner:13066 BRANCH=none TEST=manual - hack flash_physical_erase() to print something just after flash_is_erased() check. 1. flasherase 0x1f800 0x800 2. flashwrite 0x1fa00 0x100 3. flasherase 0x1f800 0x800 -> only re-erases 0x1fa00 Change-Id: I4d726caf0605e7815b9360bb2d44bdfdd757b4a2 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/61110 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
-rw-r--r--chip/stm32/config-stm32l15x.h3
-rw-r--r--chip/stm32/flash-stm32l.c9
-rw-r--r--common/flash_common.c13
3 files changed, 16 insertions, 9 deletions
diff --git a/chip/stm32/config-stm32l15x.h b/chip/stm32/config-stm32l15x.h
index eac9347ecb..c03ff5d8e9 100644
--- a/chip/stm32/config-stm32l15x.h
+++ b/chip/stm32/config-stm32l15x.h
@@ -36,3 +36,6 @@
/* Lots of RAM, so use bigger UART buffer */
#define CONFIG_UART_TX_BUF_SIZE 2048
+
+/* Flash erases to 0, not 1 */
+#define CONFIG_FLASH_ERASED_VALUE32 0
diff --git a/chip/stm32/flash-stm32l.c b/chip/stm32/flash-stm32l.c
index afb614b921..a08328baa0 100644
--- a/chip/stm32/flash-stm32l.c
+++ b/chip/stm32/flash-stm32l.c
@@ -263,11 +263,10 @@ int flash_physical_erase(int offset, int size)
address += CONFIG_FLASH_ERASE_SIZE / sizeof(uint32_t)) {
timestamp_t deadline;
- /*
- * crosbug.com/p/13066
- * We can't do the flash_is_erased() trick on stm32l since
- * bits erase to 0, not 1. Will address later if needed.
- */
+ /* Do nothing if already erased */
+ if (flash_is_erased((uint32_t)address - CONFIG_FLASH_BASE,
+ CONFIG_FLASH_ERASE_SIZE))
+ continue;
/* Start erase */
*address = 0x00000000;
diff --git a/common/flash_common.c b/common/flash_common.c
index d9834bfea2..16ad911594 100644
--- a/common/flash_common.c
+++ b/common/flash_common.c
@@ -16,6 +16,14 @@
#include "util.h"
#include "vboot_hash.h"
+/*
+ * Contents of erased flash, as a 32-bit value. Most platforms erase flash
+ * bits to 1.
+ */
+#ifndef CONFIG_FLASH_ERASED_VALUE32
+#define CONFIG_FLASH_ERASED_VALUE32 (-1U)
+#endif
+
/* Persistent protection state - emulates a SPI status register for flashrom */
struct persist_state {
uint8_t version; /* Version of this struct */
@@ -105,8 +113,6 @@ int flash_dataptr(int offset, int size_req, int align, const char **ptrp)
return CONFIG_FLASH_SIZE - offset;
}
-/* crosbug.com/p/13066 - not supported on STM32L */
-#ifndef CHIP_FAMILY_stm32l
int flash_is_erased(uint32_t offset, int size)
{
const uint32_t *ptr;
@@ -116,12 +122,11 @@ int flash_is_erased(uint32_t offset, int size)
return 0;
for (size /= sizeof(uint32_t); size > 0; size -= 4, ptr++)
- if (*ptr != -1U)
+ if (*ptr != CONFIG_FLASH_ERASED_VALUE32)
return 0;
return 1;
}
-#endif
test_mockable int flash_write(int offset, int size, const char *data)
{