diff options
| author | Scott Collyer <scollyer@google.com> | 2018-03-16 09:55:24 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-03-20 22:21:39 -0700 |
| commit | 6e92603e06084e9c517826bf92c37b0efd5a2e9e (patch) | |
| tree | 7585d98ae29998a613cf8af3d3fb588a08395df7 | |
| parent | 261afe62f30f0a259505b14ec1afcfb6fb1d781a (diff) | |
| download | chrome-ec-6e92603e06084e9c517826bf92c37b0efd5a2e9e.tar.gz | |
yorp: Include NXP203483 PPC driver
This CL fills out the ppc_chips and config options required to support
the NX20P3483 PPC. On Yorp for port 0 SNK/SRC control is driven by the
TCPC, while on port 1 it's driven by the EC.
BUG=b:74206647,b:74127309
BRANCH=none
TEST=make -j BOARD=yorp and verify there are no errors.
Change-Id: I41920be0bf4d9232101d8e1840714ca0c70f1bc5
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/966927
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
| -rw-r--r-- | board/yorp/board.c | 35 | ||||
| -rw-r--r-- | board/yorp/board.h | 5 |
2 files changed, 31 insertions, 9 deletions
diff --git a/board/yorp/board.c b/board/yorp/board.c index e00b1313aa..903d1b7403 100644 --- a/board/yorp/board.c +++ b/board/yorp/board.c @@ -10,6 +10,7 @@ #include "common.h" #include "driver/bc12/bq24392.h" #include "driver/charger/bd9995x.h" +#include "driver/ppc/nx20p3483.h" #include "driver/tcpm/anx74xx.h" #include "driver/tcpm/ps8xxx.h" #include "driver/tcpm/tcpci.h" @@ -38,7 +39,18 @@ static void tcpc_alert_event(enum gpio_signal signal) static void ppc_interrupt(enum gpio_signal signal) { - /* TODO(b/74127309): Flesh out USB code */ + switch (signal) { + case GPIO_USB_PD_C0_INT_L: + nx20p3483_interrupt(0); + break; + + case GPIO_USB_PD_C1_INT_L: + nx20p3483_interrupt(1); + break; + + default: + break; + } } /* Must come after other header files and GPIO interrupts*/ @@ -124,6 +136,14 @@ void chipset_do_shutdown(void) ; } +static void board_init(void) +{ + /* Enable PPC interrupts. */ + gpio_enable_interrupt(GPIO_USB_PD_C0_INT_L); + gpio_enable_interrupt(GPIO_USB_PD_C1_INT_L); +} +DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); + enum adc_channel board_get_vbus_adc(int port) { return port ? ADC_VBUS_C1 : ADC_VBUS_C0; @@ -191,15 +211,16 @@ struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = { const struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_COUNT] = { [USB_PD_PORT_ANX74XX] = { .i2c_port = I2C_PORT_TCPC0, - /* TODO(b/74206647): Write PPC driver */ - .i2c_addr = 0, - .drv = 0 + .i2c_addr = NX20P3483_ADDR0, + .drv = &nx20p3483_drv, }, [USB_PD_PORT_PS8751] = { .i2c_port = I2C_PORT_TCPC1, - /* TODO(b/74206647): Write PPC driver */ - .i2c_addr = 0, - .drv = 0 + .i2c_addr = NX20P3483_ADDR0, + .drv = &nx20p3483_drv, + .flags = PPC_CFG_FLAGS_GPIO_CONTROL, + .snk_gpio = GPIO_USB_C1_CHARGE_ON, + .src_gpio = GPIO_EN_USB_C1_5V_OUT, }, }; const unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); diff --git a/board/yorp/board.h b/board/yorp/board.h index 3061b7b75a..44017047d5 100644 --- a/board/yorp/board.h +++ b/board/yorp/board.h @@ -10,6 +10,7 @@ /* Optional features */ #define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands while in dev. */ +#define CONFIG_CMD_PPC_DUMP /* NPCX7 config */ #define NPCX_UART_MODULE2 1 /* GPIO64/65 are used as UART pins. */ @@ -58,7 +59,6 @@ #define CONFIG_USB_PD_ALT_MODE_DFP #define CONFIG_USB_PD_COMM_LOCKED #define CONFIG_USB_PD_DISCHARGE_PPC -#define CONFIG_USB_PD_VBUS_DETECT_PPC #define CONFIG_USB_PD_TCPC_LOW_POWER #define CONFIG_USB_PD_TCPM_ANX74XX /* C0 TCPC: ANX7447QN */ #define CONFIG_USB_PD_TCPM_PS8751 /* C1 TCPC: PS8751 */ @@ -67,7 +67,8 @@ #define CONFIG_USB_PD_TRY_SRC #define CONFIG_USBC_SS_MUX #define CONFIG_USBC_SS_MUX_DFP_ONLY -#define CONFIG_USBC_PPC /* TODO(b/74206647): Remove this one have real driver */ +#define CONFIG_USBC_PPC_NX20P3483 +/* TODO (b/75975215): Add correct VBUS_DETECT config option here */ #define CONFIG_USBC_VCONN #define CONFIG_USBC_VCONN_SWAP #define CONFIG_CMD_PD_CONTROL |