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authorJett Rink <jettrink@chromium.org>2018-03-21 15:51:47 -0600
committerchrome-bot <chrome-bot@chromium.org>2018-03-21 20:48:39 -0700
commita615f3c7d3787b8f7be9a82c292228ed26eda963 (patch)
tree5fe1823923dd1d38ff48d77b55c9ee8ef7001f35
parente513b7339ad66c30fa9cee626e478d06a714e42c (diff)
downloadchrome-ec-a615f3c7d3787b8f7be9a82c292228ed26eda963.tar.gz
yorp: Enabling power in both USB-A ports in S0
BRANCH=none BUG=b:74388692,b:75986973 TEST=build all Change-Id: Ief74b3e1a18ca90cb8fbf76c51780f659e4caf61 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/974310 Reviewed-by: Furquan Shaikh <furquan@chromium.org>
-rw-r--r--board/yorp/board.c6
-rw-r--r--board/yorp/board.h4
2 files changed, 9 insertions, 1 deletions
diff --git a/board/yorp/board.c b/board/yorp/board.c
index 903d1b7403..f42d5d2898 100644
--- a/board/yorp/board.c
+++ b/board/yorp/board.c
@@ -107,6 +107,12 @@ const struct i2c_port_t i2c_ports[] = {
};
const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
+/* USB-A port configuration */
+const int usb_port_enable[USB_PORT_COUNT] = {
+ GPIO_EN_USB_A_5V,
+ /* TODO(b/74388692): Add second port control after hardware fix. */
+};
+
/* Called by APL power state machine when transitioning from G3 to S5 */
static void chipset_pre_init(void)
{
diff --git a/board/yorp/board.h b/board/yorp/board.h
index 44017047d5..f20bc387dc 100644
--- a/board/yorp/board.h
+++ b/board/yorp/board.h
@@ -75,7 +75,9 @@
#define CONFIG_BC12_DETECT_BQ24392
#define CONFIG_USB_PD_VBUS_MEASURE_ADC_EACH_PORT
-/* TODO(b/74388692): Adding USB-A BC 1.2 charging support */
+/* USB-A Configuration */
+#define CONFIG_USB_PORT_POWER_DUMB
+#define USB_PORT_COUNT 1 /* TODO(b/74388692): Make 2 after hardware fix. */
/* TODO(b/74244817): Use correct PD delay values */
#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */