summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAndrew McRae <amcrae@google.com>2020-06-29 15:39:51 +1000
committerCommit Bot <commit-bot@chromium.org>2020-06-30 10:24:52 +0000
commit0742473b5180523836489f0c53b5734300e2d54f (patch)
tree9d4d5f7a691aa176cc730c9bdd6492f386b14f23
parent6684f84b7c66a5d0b7b6fc4c13026951040bdc53 (diff)
downloadchrome-ec-0742473b5180523836489f0c53b5734300e2d54f.tar.gz
Noibat: Check for USB 4 not present.
Noibat does not include USB A port 4. Add a field to the fw_config to represent this, and use the field to determine whether the port overcurrent interrupt should be enabled or accessed. BUG=b:156988621 TEST=build all and check that Puff still works. BRANCH=none Change-Id: Ie602974db0e9492d4dc44be53349d41f4565112d Signed-off-by: Andrew McRae <amcrae@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2269395 Tested-by: Andrew McRae <amcrae@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Commit-Queue: Andrew McRae <amcrae@chromium.org>
-rw-r--r--board/puff/board.c22
-rw-r--r--board/puff/board.h10
-rw-r--r--board/puff/gpio.inc11
3 files changed, 35 insertions, 8 deletions
diff --git a/board/puff/board.c b/board/puff/board.c
index 0ea018ebc3..397d62daf3 100644
--- a/board/puff/board.c
+++ b/board/puff/board.c
@@ -143,7 +143,7 @@ static void update_5v_usage(void)
base_5v_power += PWR_REAR;
if (!gpio_get_level(GPIO_USB_A3_OC_ODL))
base_5v_power += PWR_REAR;
- if (!gpio_get_level(GPIO_USB_A4_OC_ODL))
+ if (ec_config_get_usb4_present() && !gpio_get_level(GPIO_USB_A4_OC_ODL))
base_5v_power += PWR_REAR;
if (!gpio_get_level(GPIO_HDMI_CONN0_OC_ODL))
base_5v_power += PWR_HDMI;
@@ -535,10 +535,21 @@ static void board_tcpc_init(void)
gpio_enable_interrupt(GPIO_USB_A1_OC_ODL);
gpio_enable_interrupt(GPIO_USB_A2_OC_ODL);
gpio_enable_interrupt(GPIO_USB_A3_OC_ODL);
- gpio_enable_interrupt(GPIO_USB_A4_OC_ODL);
+ if (ec_config_get_usb4_present()) {
+ /*
+ * By default configured as output low.
+ */
+ gpio_set_flags(GPIO_USB_A4_OC_ODL,
+ GPIO_INPUT | GPIO_INT_BOTH);
+ gpio_enable_interrupt(GPIO_USB_A4_OC_ODL);
+ } else {
+ /* Ensure no interrupts from pin */
+ gpio_disable_interrupt(GPIO_USB_A4_OC_ODL);
+ }
}
-DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 1);
+/* Make sure this is called after fw_config is initialised */
+DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 2);
int64_t get_time_dsw_pwrok(void)
{
@@ -665,6 +676,11 @@ unsigned int ec_config_get_bj_power(void)
return bj;
}
+int ec_config_get_usb4_present(void)
+{
+ return !(fw_config & EC_CFG_NO_USB4_MASK);
+}
+
/*
* Power monitoring and management.
*
diff --git a/board/puff/board.h b/board/puff/board.h
index 2d81fd2310..55f3acca1a 100644
--- a/board/puff/board.h
+++ b/board/puff/board.h
@@ -234,13 +234,23 @@ void led_alert(int enable);
void show_critical_error(void);
/*
+ * firmware config fields
+ */
+/*
* Barrel-jack power (4 bits).
*/
#define EC_CFG_BJ_POWER_L 0
#define EC_CFG_BJ_POWER_H 3
#define EC_CFG_BJ_POWER_MASK GENMASK(EC_CFG_BJ_POWER_H, EC_CFG_BJ_POWER_L)
+/*
+ * USB Connector 4 not present (1 bit).
+ */
+#define EC_CFG_NO_USB4_L 4
+#define EC_CFG_NO_USB4_H 4
+#define EC_CFG_NO_USB4_MASK GENMASK(EC_CFG_NO_USB4_H, EC_CFG_NO_USB4_L)
unsigned int ec_config_get_bj_power(void);
+int ec_config_get_usb4_present(void);
#endif /* !__ASSEMBLER__ */
diff --git a/board/puff/gpio.inc b/board/puff/gpio.inc
index 509d54beb6..bb43f319d2 100644
--- a/board/puff/gpio.inc
+++ b/board/puff/gpio.inc
@@ -53,11 +53,12 @@ GPIO_INT(BJ_ADP_PRESENT_L, PIN(8, 2), GPIO_INT_BOTH | GPIO_PULL_UP, adp_conn
/* Port power control interrupts */
GPIO_INT(HDMI_CONN0_OC_ODL, PIN(0, 7), GPIO_INT_BOTH, port_ocp_interrupt)
GPIO_INT(HDMI_CONN1_OC_ODL, PIN(0, 6), GPIO_INT_BOTH, port_ocp_interrupt)
-GPIO_INT(USB_A0_OC_ODL, PIN(E, 4), GPIO_ODR_HIGH, port_ocp_interrupt)
-GPIO_INT(USB_A1_OC_ODL, PIN(A, 2), GPIO_ODR_HIGH, port_ocp_interrupt)
-GPIO_INT(USB_A2_OC_ODL, PIN(F, 5), GPIO_ODR_HIGH, port_ocp_interrupt)
-GPIO_INT(USB_A3_OC_ODL, PIN(0, 3), GPIO_ODR_HIGH, port_ocp_interrupt)
-GPIO_INT(USB_A4_OC_ODL, PIN(B, 0), GPIO_ODR_HIGH, port_ocp_interrupt)
+GPIO_INT(USB_A0_OC_ODL, PIN(E, 4), GPIO_INT_BOTH, port_ocp_interrupt)
+GPIO_INT(USB_A1_OC_ODL, PIN(A, 2), GPIO_INT_BOTH, port_ocp_interrupt)
+GPIO_INT(USB_A2_OC_ODL, PIN(F, 5), GPIO_INT_BOTH, port_ocp_interrupt)
+GPIO_INT(USB_A3_OC_ODL, PIN(0, 3), GPIO_INT_BOTH, port_ocp_interrupt)
+/* May be reconfigured as input */
+GPIO_INT(USB_A4_OC_ODL, PIN(B, 0), GPIO_OUT_LOW | GPIO_INT_BOTH, port_ocp_interrupt)
/* PCH/CPU signals */
GPIO(EC_PCH_PWROK, PIN(0, 5), GPIO_OUT_LOW)