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authorAbe Levkoy <alevkoy@chromium.org>2020-06-25 12:09:50 -0600
committerCommit Bot <commit-bot@chromium.org>2020-06-26 20:19:58 +0000
commit99ef78447ad69b1ab0c724d51b56f69d5c6c5fef (patch)
tree189ce557f537645dc8be136e80110a6dcc9717a0
parentae867643b6c283f235c24102fc90a2344c5cbb77 (diff)
downloadchrome-ec-99ef78447ad69b1ab0c724d51b56f69d5c6c5fef.tar.gz
volteer: Enable DSW_PWROK pass-through
Update GPIO assignment for the next board build, which includes this EC-to-PCH signal. The pass-through logic is already enabled. BUG=b:157609784 TEST=EC_PCH_DSW_PWROK matches PG_EC_DSW_PWROK while power cycling AP BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Icb899a481718d304b67584e152aafba44e6aea04 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2267682 Commit-Queue: Keith Short <keithshort@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
-rw-r--r--board/volteer/board.h2
-rw-r--r--board/volteer/gpio.inc7
2 files changed, 4 insertions, 5 deletions
diff --git a/board/volteer/board.h b/board/volteer/board.h
index 9a642ad7d2..bd10037cf6 100644
--- a/board/volteer/board.h
+++ b/board/volteer/board.h
@@ -112,7 +112,7 @@
#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST
#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L
#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L
-#define GPIO_PG_EC_DSW_PWROK GPIO_DSW_PWROK
+#define GPIO_PCH_DSW_PWROK GPIO_EC_PCH_DSW_PWROK
#define GPIO_POWER_BUTTON_L GPIO_H1_EC_PWR_BTN_ODL
#define GPIO_RSMRST_L_PGOOD GPIO_PG_EC_RSMRST_ODL
#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL
diff --git a/board/volteer/gpio.inc b/board/volteer/gpio.inc
index 41172251ac..4e52700a64 100644
--- a/board/volteer/gpio.inc
+++ b/board/volteer/gpio.inc
@@ -21,8 +21,8 @@ GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt)
#endif
GPIO_INT(SLP_SUS_L, PIN(D, 7), GPIO_INT_BOTH, power_signal_interrupt)
GPIO_INT(PG_EC_RSMRST_ODL, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(DSW_PWROK, PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(PG_EC_ALL_SYS_PWRGD, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(PG_EC_DSW_PWROK, PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(PG_EC_ALL_SYS_PWRGD, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt)
/* Sensor Interrupts */
GPIO_INT(EC_IMU_INT_L, PIN(5, 6), GPIO_INT_FALLING | GPIO_SEL_1P8V, bmi260_interrupt)
@@ -49,8 +49,7 @@ GPIO_INT(EC_VOLUP_BTN_ODL, PIN(9, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_inte
GPIO(EN_PP3300_A, PIN(A, 3), GPIO_OUT_LOW)
GPIO(EN_PP5000_A, PIN(A, 4), GPIO_OUT_LOW)
GPIO(EN_PPVAR_VCCIN, PIN(4, 3), GPIO_OUT_LOW) /* Enables VCCIN IMPV9 */
-/* The EC does not buffer this signal on Volteer. */
-UNIMPLEMENTED(PCH_DSW_PWROK)
+GPIO(EC_PCH_DSW_PWROK, PIN(C, 0), GPIO_OUT_LOW)
/* Other wake sources */
/*