cr50: Add board strapping options for Sarien/Arcada

Add 2 new board properties:
 * BOARD_WP_DISABLE_DELAY - forces an additional delay after
   detecting battery removal before disabling write protect

 * BOARD_CLOSED_SOURCE_SET1 - enables custom CR50 options
   for Sarien/Arcada boards that use a closed source EC

Add Sarien/Arcada to board_cfg_table.

BUG=b:118688072
BRANCH=none
TEST=make buildall, flashed RW Cr50 firmware onto Careena board and
verified boots new version

Change-Id: Ic9ffdf4861c2239a1e68eb682152c70fb1f9bfc3
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1310093
Reviewed-by: Mary Ruthven <mruthven@chromium.org>

2 files changed, 47 insertions, 8 deletions

diff --git a/board/cr50/board.c b/board/cr50/board.c
index 1ba863e9ac..fcd4107ea1 100644
--- a/board/cr50/board.c
+++ b/board/cr50/board.c
@@ -225,16 +225,38 @@ const struct strap_desc strap_regs[] = {
 static struct board_cfg board_cfg_table[] = {
 	/* SPI Variants: DIOA12 = 1M PD, DIOA6 = 1M PD */
 	/* Kevin/Gru: DI0A9 = 5k PD, DIOA1 = 1M PU */
-	{ 0x02, BOARD_SLAVE_CONFIG_SPI | BOARD_NEEDS_SYS_RST_PULL_UP },
+	{
+		.strap_cfg = 0x02,
+		.board_properties = BOARD_SLAVE_CONFIG_SPI |
+			BOARD_NEEDS_SYS_RST_PULL_UP,
+	},
 	/* Poppy: DI0A9 = 1M PU, DIOA1 = 1M PU */
-	{ 0x0A, BOARD_SLAVE_CONFIG_SPI | BOARD_USE_PLT_RESET },
-
+	{
+		.strap_cfg = 0x0A,
+		.board_properties = BOARD_SLAVE_CONFIG_SPI |
+			BOARD_USE_PLT_RESET,
+	},
 	/* I2C Variants: DIOA9 = 1M PD, DIOA1 = 1M PD */
 	/* Reef/Eve: DIOA12 = 5k PD, DIOA6 = 1M PU */
-	{ 0x20, BOARD_SLAVE_CONFIG_I2C | BOARD_USE_PLT_RESET },
+	{
+		.strap_cfg = 0x20,
+		.board_properties = BOARD_SLAVE_CONFIG_I2C |
+			BOARD_USE_PLT_RESET,
+	},
 	/* Rowan: DIOA12 = 5k PD, DIOA6 = 5k PU */
-	{ 0x30, BOARD_SLAVE_CONFIG_I2C | BOARD_DEEP_SLEEP_DISABLED |
-	  BOARD_DETECT_AP_WITH_UART },
+	{
+		.strap_cfg = 0x30,
+		.board_properties = BOARD_SLAVE_CONFIG_I2C |
+			BOARD_DEEP_SLEEP_DISABLED | BOARD_DETECT_AP_WITH_UART,
+	},
+	/* Sarien/Arcada: DIOA12 = 1M PD, DIOA6 = 5k PU */
+	{
+		.strap_cfg = 0x70,
+		.board_properties = BOARD_SLAVE_CONFIG_I2C |
+			BOARD_USE_PLT_RESET | BOARD_WP_DISABLE_DELAY |
+			BOARD_CLOSED_SOURCE_SET1,
+	},
+
 };
 
 void post_reboot_request(void)
diff --git a/board/cr50/scratch_reg1.h b/board/cr50/scratch_reg1.h
index 52e4b4651c..5540ee514d 100644
--- a/board/cr50/scratch_reg1.h
+++ b/board/cr50/scratch_reg1.h
@@ -15,7 +15,7 @@
 #define BOARD_SLAVE_CONFIG_I2C       (1 << 1)   /* TPM uses I2C interface */
 
 /*
- * The gaps are left to enusre backwards compatibility with the earliest cr50
+ * The gaps are left to ensure backwards compatibility with the earliest cr50
  * code releases. It will be possible to safely reuse these gaps if and when the
  * rest of the bits are taken.
  */
@@ -54,11 +54,28 @@
 #define BOARD_ITE_EC_SYNC_NEEDED     (1 << 15)
 
 /*
+ * Enable delayed write protect disable for systems that can be opened
+ * in less than 2 minutes
+ */
+#define BOARD_WP_DISABLE_DELAY       (1 << 16)
+/*
+ * Enable custom options required for the closed source EC on the
+ * Sarien/Arcada boards.  Includes the following behavior
+ *    Enable factory mode to closed-source EC via GPIO
+ *    Support customer diagnostic mode
+ *    UEFI factory mode
+ *    EC extended reset
+ *    Power+Refresh recovery mode (instead of Power+Refresh+Esc)
+ */
+#define BOARD_CLOSED_SOURCE_SET1     (1 << 17)
+
+/*
  * Macro to capture all properties related to board strapping pins. This must be
  * updated if additional strap related properties are added.
  */
 #define BOARD_ALL_PROPERTIES (BOARD_SLAVE_CONFIG_SPI | BOARD_SLAVE_CONFIG_I2C \
 	| BOARD_NEEDS_SYS_RST_PULL_UP | BOARD_USE_PLT_RESET | \
-	BOARD_DEEP_SLEEP_DISABLED | BOARD_DETECT_AP_WITH_UART)
+	BOARD_DEEP_SLEEP_DISABLED | BOARD_DETECT_AP_WITH_UART | \
+	BOARD_WP_DISABLE_DELAY | BOARD_CLOSED_SOURCE_SET1)
 
 #endif  /* ! __EC_BOARD_CR50_SCRATCH_REG1_H */