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authorVic Yang <victoryang@chromium.org>2014-11-12 10:29:33 -0800
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2014-11-12 23:08:12 +0000
commit3bcc5673c9f3c1d82eee491b29befaeb5bd0bd1a (patch)
tree74f3f70e63208a331b1cd08fd76dcfa5a14bac2c
parent6967cae77e1eaf70ae7af20f075c4c6994bb9af2 (diff)
downloadchrome-ec-3bcc5673c9f3c1d82eee491b29befaeb5bd0bd1a.tar.gz
ryu: switch default firmware to use STM32F373
This simply renames ryu to ryu_p1, and ryu_p2 to ryu. 'ryu_p1' will be kept for a while and will be decommisioned when most developers make switch to the new boards. BRANCH=None BUG=chrome-os-partner:33583 TEST=Build ryu and boot on P2 board. Change-Id: Ief61c64c6aefdaeae76ac7b86e0ea28131810aa1 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/229291 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
-rw-r--r--board/ryu/board.c27
-rw-r--r--board/ryu/board.h20
-rw-r--r--board/ryu/build.mk6
-rw-r--r--board/ryu/ec.tasklist3
-rw-r--r--board/ryu/gpio.inc55
-rw-r--r--board/ryu/usb_pd_config.h22
-rw-r--r--board/ryu/usb_pd_policy.c51
l---------board/ryu_p1/Makefile (renamed from board/ryu_p2/Makefile)0
-rw-r--r--board/ryu_p1/battery.c (renamed from board/ryu_p2/battery.c)0
-rw-r--r--board/ryu_p1/board.c (renamed from board/ryu_p2/board.c)27
-rw-r--r--board/ryu_p1/board.h (renamed from board/ryu_p2/board.h)20
-rw-r--r--board/ryu_p1/build.mk (renamed from board/ryu_p2/build.mk)6
-rw-r--r--board/ryu_p1/ec.tasklist (renamed from board/ryu_p2/ec.tasklist)3
-rw-r--r--board/ryu_p1/gpio.inc (renamed from board/ryu_p2/gpio.inc)55
-rw-r--r--board/ryu_p1/usb_pd_config.h (renamed from board/ryu_p2/usb_pd_config.h)22
-rw-r--r--board/ryu_p1/usb_pd_policy.c (renamed from board/ryu_p2/usb_pd_policy.c)51
-rw-r--r--common/lb_common.c4
-rwxr-xr-xutil/flash_ec2
18 files changed, 187 insertions, 187 deletions
diff --git a/board/ryu/board.c b/board/ryu/board.c
index eb336131a0..af660017fb 100644
--- a/board/ryu/board.c
+++ b/board/ryu/board.c
@@ -74,7 +74,7 @@ const struct adc_t adc_channels[] = {
[ADC_VBUS] = {"VBUS", 30000, 4096, 0, STM32_AIN(0)},
/* USB PD CC lines sensing. Converted to mV (3000mV/4096). */
[ADC_CC1_PD] = {"CC1_PD", 3000, 4096, 0, STM32_AIN(1)},
- [ADC_CC2_PD] = {"CC1_PD", 3000, 4096, 0, STM32_AIN(3)},
+ [ADC_CC2_PD] = {"CC2_PD", 3000, 4096, 0, STM32_AIN(3)},
/* Charger current sensing. Converted to mA. */
[ADC_IADP] = {"IADP", 7500, 4096, 0, STM32_AIN(8)},
[ADC_IBAT] = {"IBAT", 37500, 4096, 0, STM32_AIN(13)},
@@ -139,31 +139,6 @@ int board_get_usb_mux(int port, const char **dp_str, const char **usb_str)
return has_ss;
}
-void board_flip_usb_mux(int port)
-{
- int usb_polarity;
-
- /* Flip DP polarity */
- gpio_set_level(GPIO_USBC_DP_POLARITY,
- !gpio_get_level(GPIO_USBC_DP_POLARITY));
-
- /* Flip USB polarity if enabled */
- if (gpio_get_level(GPIO_USBC_SS1_USB_MODE_L) &&
- gpio_get_level(GPIO_USBC_SS2_USB_MODE_L))
- return;
- usb_polarity = gpio_get_level(GPIO_USBC_SS1_USB_MODE_L);
-
- /*
- * Disable both sides first so that we don't enable both at the
- * same time accidentally.
- */
- gpio_set_level(GPIO_USBC_SS1_USB_MODE_L, 1);
- gpio_set_level(GPIO_USBC_SS2_USB_MODE_L, 1);
-
- gpio_set_level(GPIO_USBC_SS1_USB_MODE_L, !usb_polarity);
- gpio_set_level(GPIO_USBC_SS2_USB_MODE_L, usb_polarity);
-}
-
/**
* Discharge battery when on AC power for factory test.
*/
diff --git a/board/ryu/board.h b/board/ryu/board.h
index 4530db90cf..8e708b97c4 100644
--- a/board/ryu/board.h
+++ b/board/ryu/board.h
@@ -11,7 +11,7 @@
/* 48 MHz SYSCLK clock frequency */
#define CPU_CLOCK 48000000
-/* the UART console is on USART2 (PA14/PA15) */
+/* the UART console is on USART2 (PD4/PD5) */
#undef CONFIG_UART_CONSOLE
#define CONFIG_UART_CONSOLE 2
@@ -19,9 +19,9 @@
#define CC_DEFAULT (CC_ALL & ~CC_MASK(CC_USBPD))
/* Optional features */
+#define CONFIG_FORCE_CONSOLE_RESUME
#define CONFIG_STM_HWTIMER32
#define CONFIG_USB_POWER_DELIVERY
-#define CONFIG_USB_PD_CUSTOM_VDM
#define CONFIG_USB_PD_DUAL_ROLE
#define CONFIG_USB_PD_FLASH_ERASE_CHECK
#define CONFIG_USB_PD_INTERNAL_COMP
@@ -31,16 +31,15 @@
#define CONFIG_HW_CRC
#define CONFIG_I2C
#define CONFIG_LID_SWITCH
+#define CONFIG_LOW_POWER_IDLE
#define CONFIG_VBOOT_HASH
-#undef CONFIG_WATCHDOG_HELP
+#define CONFIG_WATCHDOG_HELP
#undef CONFIG_TASK_PROFILING
-#undef CONFIG_CONSOLE_CMDHELP
#define CONFIG_INDUCTIVE_CHARGING
#undef CONFIG_HIBERNATE
-#define CONFIG_DEBUG_ASSERT_BRIEF
-
-/* Disable unused console command to save flash space */
-#undef CONFIG_CMD_POWERINDEBUG
+#undef CONFIG_UART_TX_DMA /* DMAC_CH7 is used by USB PD */
+#define CONFIG_UART_RX_DMA
+#define CONFIG_UART_RX_DMA_CH STM32_DMAC_USART2_RX
/*
* Pericom I2C workaround
@@ -76,6 +75,7 @@
#define I2C_PORT_EC I2C_PORT_SLAVE
#define I2C_PORT_CHARGER I2C_PORT_MASTER
#define I2C_PORT_BATTERY I2C_PORT_MASTER
+#define I2C_PORT_LIGHTBAR I2C_PORT_MASTER
/* slave address for host commands */
#ifdef HAS_TASK_HOSTCMD
@@ -85,8 +85,8 @@
#ifndef __ASSEMBLER__
/* Timer selection */
-#define TIM_CLOCK32 2
-#define TIM_ADC 3
+#define TIM_CLOCK32 5
+#define TIM_WATCHDOG 19
#include "gpio_signal.h"
diff --git a/board/ryu/build.mk b/board/ryu/build.mk
index 150b265120..d498972118 100644
--- a/board/ryu/build.mk
+++ b/board/ryu/build.mk
@@ -4,10 +4,10 @@
#
# Board specific files build
-# the IC is STmicro STM32F072VBH6
+# the IC is STmicro STM32F373VB
CHIP:=stm32
-CHIP_FAMILY:=stm32f0
-CHIP_VARIANT:=stm32f07x
+CHIP_FAMILY:=stm32f3
+CHIP_VARIANT:=stm32f373
board-y=board.o battery.o
board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o
diff --git a/board/ryu/ec.tasklist b/board/ryu/ec.tasklist
index 4e99996aee..431f3ba177 100644
--- a/board/ryu/ec.tasklist
+++ b/board/ryu/ec.tasklist
@@ -18,8 +18,9 @@
*/
#define CONFIG_TASK_LIST \
TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \
+ TASK_NOTEST(LIGHTBAR, lightbar_task, NULL, LARGER_TASK_STACK_SIZE) \
TASK_ALWAYS(CHARGER, charger_task, NULL, TASK_STACK_SIZE) \
TASK_NOTEST(CHIPSET, chipset_task, NULL, TASK_STACK_SIZE) \
TASK_NOTEST(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \
- TASK_ALWAYS(CONSOLE, console_task, NULL, TASK_STACK_SIZE) \
+ TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \
TASK_ALWAYS(PD, pd_task, NULL, LARGER_TASK_STACK_SIZE)
diff --git a/board/ryu/gpio.inc b/board/ryu/gpio.inc
index b7d4193f3d..099a3c09c6 100644
--- a/board/ryu/gpio.inc
+++ b/board/ryu/gpio.inc
@@ -6,21 +6,21 @@
*/
/* Interrupts */
-GPIO(CHGR_ACOK, A, 2, GPIO_INT_BOTH | GPIO_PULL_UP, vbus_evt)
-GPIO(BC_TEMP_ALERT_L, A, 13, GPIO_INT_FALLING, unhandled_evt)
+GPIO(CHGR_ACOK, D, 4, GPIO_INT_BOTH | GPIO_PULL_UP, vbus_evt)
+GPIO(BC_TEMP_ALERT_L, C, 5, GPIO_INT_FALLING, unhandled_evt)
GPIO(POWER_BUTTON_L, C, 13, GPIO_INT_BOTH, power_button_interrupt) /* active high, the name is for compatibility with existing code */
GPIO(USBC_BC12_INT_L, D, 11, GPIO_INT_FALLING | GPIO_PULL_UP, unhandled_evt)
GPIO(LID_OPEN, E, 1, GPIO_INT_BOTH | GPIO_PULL_UP, lid_interrupt)
GPIO(CHARGE_DONE, E, 6, GPIO_INT_BOTH, inductive_charging_interrupt)
GPIO(LB_INT_L, E, 7, GPIO_INT_FALLING | GPIO_PULL_UP, unhandled_evt)
GPIO(LIGHTBAR_EN_L, E, 8, GPIO_INT_FALLING | GPIO_PULL_UP, unhandled_evt)
-GPIO(AP_IN_SUSPEND, E, 9, GPIO_INT_BOTH, power_signal_interrupt)
+GPIO(AP_IN_SUSPEND, F, 9, GPIO_INT_BOTH, power_signal_interrupt)
GPIO(BASE_PRES_L, E, 10, GPIO_INT_BOTH | GPIO_PULL_UP, unhandled_evt)
-GPIO(AP_HOLD, E, 14, GPIO_INT_BOTH, power_signal_interrupt)
+GPIO(AP_HOLD, E, 3, GPIO_INT_BOTH, power_signal_interrupt)
/* Buttons */
GPIO(BTN_VOLD_L, C, 0, GPIO_INPUT | GPIO_PULL_UP, NULL)
-GPIO(BTN_VOLU_L, C, 1, GPIO_INPUT | GPIO_PULL_UP, NULL)
+GPIO(BTN_VOLU_L, A, 2, GPIO_INPUT | GPIO_PULL_UP, NULL)
/* PD RX/TX */
GPIO(USBC_CC1_PD, A, 1, GPIO_ANALOG, NULL)
@@ -52,18 +52,18 @@ GPIO(BASE_CHG_VDD_EN, E, 5, GPIO_OUT_LOW, NULL)
/* USB-C Power and muxes control */
GPIO(USBC_CHARGE_EN_L, A, 7, GPIO_OUT_LOW, NULL)
-GPIO(USBC_5V_EN, A, 10, GPIO_OUT_LOW, NULL)
+GPIO(USBC_5V_EN, D, 8, GPIO_OUT_LOW, NULL)
GPIO(USBC_VCONN1_EN_L, F, 10, GPIO_OUT_HIGH, NULL)
GPIO(USBC_VCONN2_EN_L, D, 10, GPIO_OUT_HIGH, NULL)
GPIO(USBC_CC1_DEVICE_ODL, A, 5, GPIO_ODR_LOW, NULL)
-GPIO(USBC_CC2_DEVICE_ODL, F, 9, GPIO_ODR_LOW, NULL)
+GPIO(USBC_CC2_DEVICE_ODL, E, 14, GPIO_ODR_LOW, NULL)
GPIO(USBC_DP_MODE_L, D, 1, GPIO_OUT_HIGH, NULL)
GPIO(USBC_DP_POLARITY, D, 2, GPIO_OUT_HIGH, NULL)
GPIO(USBC_SS1_USB_MODE_L, D, 3, GPIO_OUT_HIGH, NULL)
-GPIO(USBC_SS2_USB_MODE_L, D, 5, GPIO_OUT_HIGH, NULL)
-GPIO(USBC_SS_EN_L, D, 6, GPIO_OUT_HIGH, NULL)
+GPIO(USBC_SS2_USB_MODE_L, D, 9, GPIO_OUT_HIGH, NULL)
+GPIO(USBC_SS_EN_L, E, 0, GPIO_OUT_HIGH, NULL)
/* Inputs */
GPIO(BOARD_ID0, E, 11, GPIO_INPUT, NULL)
@@ -77,33 +77,33 @@ GPIO(LB_RST_L, D, 15, GPIO_ODR_HIGH | GPIO_PULL_UP, NULL)
/* Alternate functions */
GPIO(USB_DM, A, 11, GPIO_ANALOG, NULL)
GPIO(USB_DP, A, 12, GPIO_ANALOG, NULL)
-GPIO(UART_TX, A, 14, GPIO_OUT_LOW, NULL)
-GPIO(UART_RX, A, 15, GPIO_OUT_LOW, NULL)
+GPIO(UART_TX, D, 5, GPIO_OUT_LOW, NULL)
+GPIO(UART_RX, D, 6, GPIO_OUT_LOW, NULL)
#endif
/*
* I2C pins should be configured as inputs until I2C module is
* initialized. This will avoid driving the lines unintentionally.
*/
-GPIO(MASTER_I2C_SCL, B, 8, GPIO_INPUT, NULL)
-GPIO(MASTER_I2C_SDA, B, 9, GPIO_INPUT, NULL)
-GPIO(SLAVE_I2C_SCL, B, 10, GPIO_INPUT, NULL)
-GPIO(SLAVE_I2C_SDA, B, 11, GPIO_INPUT, NULL)
+GPIO(MASTER_I2C_SCL, A, 15, GPIO_INPUT, NULL)
+GPIO(MASTER_I2C_SDA, A, 14, GPIO_INPUT, NULL)
+GPIO(SLAVE_I2C_SCL, A, 9, GPIO_INPUT, NULL)
+GPIO(SLAVE_I2C_SDA, A, 10, GPIO_INPUT, NULL)
/* SCL gating for PI3USB9281 */
GPIO(PERICOM_CLK_EN, C, 15, GPIO_OUT_LOW, NULL)
/* Case closed debugging. */
-GPIO(PD_DISABLE_DEBUG, C, 5, GPIO_OUT_HIGH, NULL)
-GPIO(SPI_FLASH_NSS, B, 12, GPIO_INPUT, NULL)
-GPIO(SPI_FLASH_SCK, B, 13, GPIO_INPUT, NULL)
-GPIO(SPI_FLASH_MOSI, B, 14, GPIO_INPUT, NULL)
-GPIO(SPI_FLASH_MISO, B, 15, GPIO_INPUT, NULL)
+GPIO(PD_DISABLE_DEBUG, C, 6, GPIO_OUT_HIGH, NULL)
+GPIO(SPI_FLASH_NSS, B, 9, GPIO_INPUT, NULL)
+GPIO(SPI_FLASH_SCK, B, 10, GPIO_INPUT, NULL)
+GPIO(SPI_FLASH_MOSI, B, 15, GPIO_INPUT, NULL)
+GPIO(SPI_FLASH_MISO, B, 14, GPIO_INPUT, NULL)
GPIO(VDDSPI_EN, C, 12, GPIO_OUT_LOW, NULL)
GPIO(SH_RESET_L, C, 4, GPIO_ODR_HIGH, NULL)
GPIO(SH_BOOT, C, 9, GPIO_ODR_HIGH, NULL)
GPIO(EC_INT_L, F, 2, GPIO_ODR_HIGH, NULL)
-GPIO(ENTERING_RW, F, 3, GPIO_OUT_LOW, NULL)
+GPIO(ENTERING_RW, E, 15, GPIO_OUT_LOW, NULL)
GPIO(WP_L, F, 6, GPIO_INPUT, NULL)
#if 0
@@ -116,9 +116,10 @@ GPIO(AP_UART_RX, B, 7, GPIO_INPUT, NULL)
UNIMPLEMENTED(AP_RESET_L)
-ALTERNATE(B, 0x0008, 0, MODULE_USB_PD, 0) /* SPI1: SCK(PB3) */
-ALTERNATE(B, 0x0002, 0, MODULE_USB_PD, 0) /* TIM14_CH1: PB1 */
-ALTERNATE(B, 0x00C0, 0, MODULE_UART, 0) /* USART1: PB6/PB7 */
-ALTERNATE(A, 0xC000, 1, MODULE_UART, GPIO_PULL_UP) /* USART2: PA14/PA15 */
-ALTERNATE(C, 0x0C00, 1, MODULE_UART, 0) /* USART3: PC10/PC11 */
-ALTERNATE(B, 0x0F00, 1, MODULE_I2C, 0) /* I2C SLAVE:PB10/11 MASTER:PB8/9 */
+ALTERNATE(B, 0x0008, 5, MODULE_USB_PD, 0) /* SPI1: SCK(PB3) */
+ALTERNATE(B, 0x0002, 2, MODULE_USB_PD, 0) /* TIM3_CH4: PB1 */
+ALTERNATE(B, 0x00C0, 7, MODULE_UART, 0) /* USART1: PB6/PB7 */
+ALTERNATE(D, 0x0060, 7, MODULE_UART, GPIO_PULL_UP) /* USART2: PD4/PD5 */
+ALTERNATE(C, 0x0C00, 7, MODULE_UART, 0) /* USART3: PC10/PC11 */
+ALTERNATE(A, 0xC600, 4, MODULE_I2C, 0) /* I2C SLAVE:PA9/10 MASTER:PA14/15 */
+ALTERNATE(A, 0x1800,14, MODULE_USB, 0) /* USB: PA11/12 */
diff --git a/board/ryu/usb_pd_config.h b/board/ryu/usb_pd_config.h
index 8adc002e8c..374cb083d7 100644
--- a/board/ryu/usb_pd_config.h
+++ b/board/ryu/usb_pd_config.h
@@ -14,15 +14,15 @@
#define TASK_ID_TO_PORT(id) 0
/* Timer selection for baseband PD communication */
-#define TIM_CLOCK_PD_TX_C0 14
-#define TIM_CLOCK_PD_RX_C0 1
+#define TIM_CLOCK_PD_TX_C0 3
+#define TIM_CLOCK_PD_RX_C0 2
#define TIM_CLOCK_PD_TX(p) TIM_CLOCK_PD_TX_C0
#define TIM_CLOCK_PD_RX(p) TIM_CLOCK_PD_RX_C0
/* Timer channel */
-#define TIM_RX_CCR_C0 1
-#define TIM_TX_CCR_C0 1
+#define TIM_RX_CCR_C0 4
+#define TIM_TX_CCR_C0 4
/* RX timer capture/compare register */
#define TIM_CCR_C0 (&STM32_TIM_CCRx(TIM_CLOCK_PD_RX_C0, TIM_RX_CCR_C0))
@@ -37,7 +37,7 @@
/* use the hardware accelerator for CRC */
#define CONFIG_HW_CRC
-/* TX is using SPI1 on PB3-5 */
+/* TX is using SPI1 on PA6, PB3, and PB5 */
#define SPI_REGS(p) STM32_SPI1_REGS
static inline void spi_enable_clock(int port)
@@ -47,9 +47,9 @@ static inline void spi_enable_clock(int port)
#define DMAC_SPI_TX(p) STM32_DMAC_CH3
-/* RX is using COMP1 triggering TIM1 CH1 */
-#define CMP1OUTSEL STM32_COMP_CMP1OUTSEL_TIM1_IC1
-#define CMP2OUTSEL STM32_COMP_CMP2OUTSEL_TIM1_IC1
+/* RX is using COMP1 triggering TIM2 CH4 */
+#define CMP1OUTSEL STM32_COMP_CMP1OUTSEL_TIM2_IC4
+#define CMP2OUTSEL STM32_COMP_CMP2OUTSEL_TIM2_IC4
#define TIM_TX_CCR_IDX(p) TIM_TX_CCR_C0
#define TIM_RX_CCR_IDX(p) TIM_RX_CCR_C0
@@ -59,14 +59,14 @@ static inline void spi_enable_clock(int port)
/* triggers packet detection on comparator falling edge */
#define EXTI_XTSR STM32_EXTI_FTSR
-#define DMAC_TIM_RX(p) STM32_DMAC_CH2
+#define DMAC_TIM_RX(p) STM32_DMAC_CH7
/* the pins used for communication need to be hi-speed */
static inline void pd_set_pins_speed(int port)
{
/* 40 MHz pin speed on SPI MISO PA6 */
STM32_GPIO_OSPEEDR(GPIO_A) |= 0x00003000;
- /* 40 MHz pin speed on TIM14_CH1 (PB1) */
+ /* 40 MHz pin speed on TIM3_CH4 (PB1) */
STM32_GPIO_OSPEEDR(GPIO_B) |= 0x0000000C;
}
@@ -82,7 +82,7 @@ static inline void pd_tx_spi_reset(int port)
static inline void pd_tx_enable(int port, int polarity)
{
/* put SPI function on TX pin : PA6 is SPI MISO */
- gpio_set_alternate_function(GPIO_A, 0x0040, 0);
+ gpio_set_alternate_function(GPIO_A, 0x0040, 5);
/* set the low level reference */
gpio_set_level(GPIO_USBC_CC_TX_EN, 1);
diff --git a/board/ryu/usb_pd_policy.c b/board/ryu/usb_pd_policy.c
index 23400e7a8b..fc55246837 100644
--- a/board/ryu/usb_pd_policy.c
+++ b/board/ryu/usb_pd_policy.c
@@ -162,54 +162,3 @@ int pd_power_swap(int port)
/* Always allow power swap */
return 1;
}
-/* ----------------- Vendor Defined Messages ------------------ */
-static int pd_custom_vdm(int port, int cnt, uint32_t *payload,
- uint32_t **rpayload)
-{
- int cmd = PD_VDO_CMD(payload[0]);
- uint16_t dev_id = 0;
- CPRINTF("VDM/%d [%d] %08x\n", cnt, cmd, payload[0]);
-
- /* make sure we have some payload */
- if (cnt == 0)
- return 0;
-
- switch (cmd) {
- case VDO_CMD_VERSION:
- /* guarantee last byte of payload is null character */
- *(payload + cnt - 1) = 0;
- CPRINTF("version: %s\n", (char *)(payload+1));
- break;
- case VDO_CMD_READ_INFO:
- case VDO_CMD_SEND_INFO:
- /* if last word is present, it contains lots of info */
- if (cnt == 7) {
- /* TODO: Notify host */
- dev_id = VDO_INFO_HW_DEV_ID(payload[6]);
- CPRINTF("Dev:0x%04x SW:%d RW:%d\n", dev_id,
- VDO_INFO_SW_DBG_VER(payload[6]),
- VDO_INFO_IS_RW(payload[6]));
- }
- /* copy hash */
- if (cnt >= 6)
- pd_dev_store_rw_hash(port, dev_id, payload + 1);
-
- break;
- case VDO_CMD_CURRENT:
- CPRINTF("Current: %dmA\n", payload[1]);
- break;
- case VDO_CMD_FLIP:
- board_flip_usb_mux(0);
- break;
- }
-
- return 0;
-}
-
-int pd_vdm(int port, int cnt, uint32_t *payload, uint32_t **rpayload)
-{
- if (PD_VDO_SVDM(payload[0]))
- return pd_svdm(port, cnt, payload, rpayload);
- else
- return pd_custom_vdm(port, cnt, payload, rpayload);
-}
diff --git a/board/ryu_p2/Makefile b/board/ryu_p1/Makefile
index 94aaae2c4d..94aaae2c4d 120000
--- a/board/ryu_p2/Makefile
+++ b/board/ryu_p1/Makefile
diff --git a/board/ryu_p2/battery.c b/board/ryu_p1/battery.c
index dc65128719..dc65128719 100644
--- a/board/ryu_p2/battery.c
+++ b/board/ryu_p1/battery.c
diff --git a/board/ryu_p2/board.c b/board/ryu_p1/board.c
index af660017fb..eb336131a0 100644
--- a/board/ryu_p2/board.c
+++ b/board/ryu_p1/board.c
@@ -74,7 +74,7 @@ const struct adc_t adc_channels[] = {
[ADC_VBUS] = {"VBUS", 30000, 4096, 0, STM32_AIN(0)},
/* USB PD CC lines sensing. Converted to mV (3000mV/4096). */
[ADC_CC1_PD] = {"CC1_PD", 3000, 4096, 0, STM32_AIN(1)},
- [ADC_CC2_PD] = {"CC2_PD", 3000, 4096, 0, STM32_AIN(3)},
+ [ADC_CC2_PD] = {"CC1_PD", 3000, 4096, 0, STM32_AIN(3)},
/* Charger current sensing. Converted to mA. */
[ADC_IADP] = {"IADP", 7500, 4096, 0, STM32_AIN(8)},
[ADC_IBAT] = {"IBAT", 37500, 4096, 0, STM32_AIN(13)},
@@ -139,6 +139,31 @@ int board_get_usb_mux(int port, const char **dp_str, const char **usb_str)
return has_ss;
}
+void board_flip_usb_mux(int port)
+{
+ int usb_polarity;
+
+ /* Flip DP polarity */
+ gpio_set_level(GPIO_USBC_DP_POLARITY,
+ !gpio_get_level(GPIO_USBC_DP_POLARITY));
+
+ /* Flip USB polarity if enabled */
+ if (gpio_get_level(GPIO_USBC_SS1_USB_MODE_L) &&
+ gpio_get_level(GPIO_USBC_SS2_USB_MODE_L))
+ return;
+ usb_polarity = gpio_get_level(GPIO_USBC_SS1_USB_MODE_L);
+
+ /*
+ * Disable both sides first so that we don't enable both at the
+ * same time accidentally.
+ */
+ gpio_set_level(GPIO_USBC_SS1_USB_MODE_L, 1);
+ gpio_set_level(GPIO_USBC_SS2_USB_MODE_L, 1);
+
+ gpio_set_level(GPIO_USBC_SS1_USB_MODE_L, !usb_polarity);
+ gpio_set_level(GPIO_USBC_SS2_USB_MODE_L, usb_polarity);
+}
+
/**
* Discharge battery when on AC power for factory test.
*/
diff --git a/board/ryu_p2/board.h b/board/ryu_p1/board.h
index 8e708b97c4..4530db90cf 100644
--- a/board/ryu_p2/board.h
+++ b/board/ryu_p1/board.h
@@ -11,7 +11,7 @@
/* 48 MHz SYSCLK clock frequency */
#define CPU_CLOCK 48000000
-/* the UART console is on USART2 (PD4/PD5) */
+/* the UART console is on USART2 (PA14/PA15) */
#undef CONFIG_UART_CONSOLE
#define CONFIG_UART_CONSOLE 2
@@ -19,9 +19,9 @@
#define CC_DEFAULT (CC_ALL & ~CC_MASK(CC_USBPD))
/* Optional features */
-#define CONFIG_FORCE_CONSOLE_RESUME
#define CONFIG_STM_HWTIMER32
#define CONFIG_USB_POWER_DELIVERY
+#define CONFIG_USB_PD_CUSTOM_VDM
#define CONFIG_USB_PD_DUAL_ROLE
#define CONFIG_USB_PD_FLASH_ERASE_CHECK
#define CONFIG_USB_PD_INTERNAL_COMP
@@ -31,15 +31,16 @@
#define CONFIG_HW_CRC
#define CONFIG_I2C
#define CONFIG_LID_SWITCH
-#define CONFIG_LOW_POWER_IDLE
#define CONFIG_VBOOT_HASH
-#define CONFIG_WATCHDOG_HELP
+#undef CONFIG_WATCHDOG_HELP
#undef CONFIG_TASK_PROFILING
+#undef CONFIG_CONSOLE_CMDHELP
#define CONFIG_INDUCTIVE_CHARGING
#undef CONFIG_HIBERNATE
-#undef CONFIG_UART_TX_DMA /* DMAC_CH7 is used by USB PD */
-#define CONFIG_UART_RX_DMA
-#define CONFIG_UART_RX_DMA_CH STM32_DMAC_USART2_RX
+#define CONFIG_DEBUG_ASSERT_BRIEF
+
+/* Disable unused console command to save flash space */
+#undef CONFIG_CMD_POWERINDEBUG
/*
* Pericom I2C workaround
@@ -75,7 +76,6 @@
#define I2C_PORT_EC I2C_PORT_SLAVE
#define I2C_PORT_CHARGER I2C_PORT_MASTER
#define I2C_PORT_BATTERY I2C_PORT_MASTER
-#define I2C_PORT_LIGHTBAR I2C_PORT_MASTER
/* slave address for host commands */
#ifdef HAS_TASK_HOSTCMD
@@ -85,8 +85,8 @@
#ifndef __ASSEMBLER__
/* Timer selection */
-#define TIM_CLOCK32 5
-#define TIM_WATCHDOG 19
+#define TIM_CLOCK32 2
+#define TIM_ADC 3
#include "gpio_signal.h"
diff --git a/board/ryu_p2/build.mk b/board/ryu_p1/build.mk
index d498972118..150b265120 100644
--- a/board/ryu_p2/build.mk
+++ b/board/ryu_p1/build.mk
@@ -4,10 +4,10 @@
#
# Board specific files build
-# the IC is STmicro STM32F373VB
+# the IC is STmicro STM32F072VBH6
CHIP:=stm32
-CHIP_FAMILY:=stm32f3
-CHIP_VARIANT:=stm32f373
+CHIP_FAMILY:=stm32f0
+CHIP_VARIANT:=stm32f07x
board-y=board.o battery.o
board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o
diff --git a/board/ryu_p2/ec.tasklist b/board/ryu_p1/ec.tasklist
index 431f3ba177..4e99996aee 100644
--- a/board/ryu_p2/ec.tasklist
+++ b/board/ryu_p1/ec.tasklist
@@ -18,9 +18,8 @@
*/
#define CONFIG_TASK_LIST \
TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \
- TASK_NOTEST(LIGHTBAR, lightbar_task, NULL, LARGER_TASK_STACK_SIZE) \
TASK_ALWAYS(CHARGER, charger_task, NULL, TASK_STACK_SIZE) \
TASK_NOTEST(CHIPSET, chipset_task, NULL, TASK_STACK_SIZE) \
TASK_NOTEST(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \
- TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \
+ TASK_ALWAYS(CONSOLE, console_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(PD, pd_task, NULL, LARGER_TASK_STACK_SIZE)
diff --git a/board/ryu_p2/gpio.inc b/board/ryu_p1/gpio.inc
index 099a3c09c6..b7d4193f3d 100644
--- a/board/ryu_p2/gpio.inc
+++ b/board/ryu_p1/gpio.inc
@@ -6,21 +6,21 @@
*/
/* Interrupts */
-GPIO(CHGR_ACOK, D, 4, GPIO_INT_BOTH | GPIO_PULL_UP, vbus_evt)
-GPIO(BC_TEMP_ALERT_L, C, 5, GPIO_INT_FALLING, unhandled_evt)
+GPIO(CHGR_ACOK, A, 2, GPIO_INT_BOTH | GPIO_PULL_UP, vbus_evt)
+GPIO(BC_TEMP_ALERT_L, A, 13, GPIO_INT_FALLING, unhandled_evt)
GPIO(POWER_BUTTON_L, C, 13, GPIO_INT_BOTH, power_button_interrupt) /* active high, the name is for compatibility with existing code */
GPIO(USBC_BC12_INT_L, D, 11, GPIO_INT_FALLING | GPIO_PULL_UP, unhandled_evt)
GPIO(LID_OPEN, E, 1, GPIO_INT_BOTH | GPIO_PULL_UP, lid_interrupt)
GPIO(CHARGE_DONE, E, 6, GPIO_INT_BOTH, inductive_charging_interrupt)
GPIO(LB_INT_L, E, 7, GPIO_INT_FALLING | GPIO_PULL_UP, unhandled_evt)
GPIO(LIGHTBAR_EN_L, E, 8, GPIO_INT_FALLING | GPIO_PULL_UP, unhandled_evt)
-GPIO(AP_IN_SUSPEND, F, 9, GPIO_INT_BOTH, power_signal_interrupt)
+GPIO(AP_IN_SUSPEND, E, 9, GPIO_INT_BOTH, power_signal_interrupt)
GPIO(BASE_PRES_L, E, 10, GPIO_INT_BOTH | GPIO_PULL_UP, unhandled_evt)
-GPIO(AP_HOLD, E, 3, GPIO_INT_BOTH, power_signal_interrupt)
+GPIO(AP_HOLD, E, 14, GPIO_INT_BOTH, power_signal_interrupt)
/* Buttons */
GPIO(BTN_VOLD_L, C, 0, GPIO_INPUT | GPIO_PULL_UP, NULL)
-GPIO(BTN_VOLU_L, A, 2, GPIO_INPUT | GPIO_PULL_UP, NULL)
+GPIO(BTN_VOLU_L, C, 1, GPIO_INPUT | GPIO_PULL_UP, NULL)
/* PD RX/TX */
GPIO(USBC_CC1_PD, A, 1, GPIO_ANALOG, NULL)
@@ -52,18 +52,18 @@ GPIO(BASE_CHG_VDD_EN, E, 5, GPIO_OUT_LOW, NULL)
/* USB-C Power and muxes control */
GPIO(USBC_CHARGE_EN_L, A, 7, GPIO_OUT_LOW, NULL)
-GPIO(USBC_5V_EN, D, 8, GPIO_OUT_LOW, NULL)
+GPIO(USBC_5V_EN, A, 10, GPIO_OUT_LOW, NULL)
GPIO(USBC_VCONN1_EN_L, F, 10, GPIO_OUT_HIGH, NULL)
GPIO(USBC_VCONN2_EN_L, D, 10, GPIO_OUT_HIGH, NULL)
GPIO(USBC_CC1_DEVICE_ODL, A, 5, GPIO_ODR_LOW, NULL)
-GPIO(USBC_CC2_DEVICE_ODL, E, 14, GPIO_ODR_LOW, NULL)
+GPIO(USBC_CC2_DEVICE_ODL, F, 9, GPIO_ODR_LOW, NULL)
GPIO(USBC_DP_MODE_L, D, 1, GPIO_OUT_HIGH, NULL)
GPIO(USBC_DP_POLARITY, D, 2, GPIO_OUT_HIGH, NULL)
GPIO(USBC_SS1_USB_MODE_L, D, 3, GPIO_OUT_HIGH, NULL)
-GPIO(USBC_SS2_USB_MODE_L, D, 9, GPIO_OUT_HIGH, NULL)
-GPIO(USBC_SS_EN_L, E, 0, GPIO_OUT_HIGH, NULL)
+GPIO(USBC_SS2_USB_MODE_L, D, 5, GPIO_OUT_HIGH, NULL)
+GPIO(USBC_SS_EN_L, D, 6, GPIO_OUT_HIGH, NULL)
/* Inputs */
GPIO(BOARD_ID0, E, 11, GPIO_INPUT, NULL)
@@ -77,33 +77,33 @@ GPIO(LB_RST_L, D, 15, GPIO_ODR_HIGH | GPIO_PULL_UP, NULL)
/* Alternate functions */
GPIO(USB_DM, A, 11, GPIO_ANALOG, NULL)
GPIO(USB_DP, A, 12, GPIO_ANALOG, NULL)
-GPIO(UART_TX, D, 5, GPIO_OUT_LOW, NULL)
-GPIO(UART_RX, D, 6, GPIO_OUT_LOW, NULL)
+GPIO(UART_TX, A, 14, GPIO_OUT_LOW, NULL)
+GPIO(UART_RX, A, 15, GPIO_OUT_LOW, NULL)
#endif
/*
* I2C pins should be configured as inputs until I2C module is
* initialized. This will avoid driving the lines unintentionally.
*/
-GPIO(MASTER_I2C_SCL, A, 15, GPIO_INPUT, NULL)
-GPIO(MASTER_I2C_SDA, A, 14, GPIO_INPUT, NULL)
-GPIO(SLAVE_I2C_SCL, A, 9, GPIO_INPUT, NULL)
-GPIO(SLAVE_I2C_SDA, A, 10, GPIO_INPUT, NULL)
+GPIO(MASTER_I2C_SCL, B, 8, GPIO_INPUT, NULL)
+GPIO(MASTER_I2C_SDA, B, 9, GPIO_INPUT, NULL)
+GPIO(SLAVE_I2C_SCL, B, 10, GPIO_INPUT, NULL)
+GPIO(SLAVE_I2C_SDA, B, 11, GPIO_INPUT, NULL)
/* SCL gating for PI3USB9281 */
GPIO(PERICOM_CLK_EN, C, 15, GPIO_OUT_LOW, NULL)
/* Case closed debugging. */
-GPIO(PD_DISABLE_DEBUG, C, 6, GPIO_OUT_HIGH, NULL)
-GPIO(SPI_FLASH_NSS, B, 9, GPIO_INPUT, NULL)
-GPIO(SPI_FLASH_SCK, B, 10, GPIO_INPUT, NULL)
-GPIO(SPI_FLASH_MOSI, B, 15, GPIO_INPUT, NULL)
-GPIO(SPI_FLASH_MISO, B, 14, GPIO_INPUT, NULL)
+GPIO(PD_DISABLE_DEBUG, C, 5, GPIO_OUT_HIGH, NULL)
+GPIO(SPI_FLASH_NSS, B, 12, GPIO_INPUT, NULL)
+GPIO(SPI_FLASH_SCK, B, 13, GPIO_INPUT, NULL)
+GPIO(SPI_FLASH_MOSI, B, 14, GPIO_INPUT, NULL)
+GPIO(SPI_FLASH_MISO, B, 15, GPIO_INPUT, NULL)
GPIO(VDDSPI_EN, C, 12, GPIO_OUT_LOW, NULL)
GPIO(SH_RESET_L, C, 4, GPIO_ODR_HIGH, NULL)
GPIO(SH_BOOT, C, 9, GPIO_ODR_HIGH, NULL)
GPIO(EC_INT_L, F, 2, GPIO_ODR_HIGH, NULL)
-GPIO(ENTERING_RW, E, 15, GPIO_OUT_LOW, NULL)
+GPIO(ENTERING_RW, F, 3, GPIO_OUT_LOW, NULL)
GPIO(WP_L, F, 6, GPIO_INPUT, NULL)
#if 0
@@ -116,10 +116,9 @@ GPIO(AP_UART_RX, B, 7, GPIO_INPUT, NULL)
UNIMPLEMENTED(AP_RESET_L)
-ALTERNATE(B, 0x0008, 5, MODULE_USB_PD, 0) /* SPI1: SCK(PB3) */
-ALTERNATE(B, 0x0002, 2, MODULE_USB_PD, 0) /* TIM3_CH4: PB1 */
-ALTERNATE(B, 0x00C0, 7, MODULE_UART, 0) /* USART1: PB6/PB7 */
-ALTERNATE(D, 0x0060, 7, MODULE_UART, GPIO_PULL_UP) /* USART2: PD4/PD5 */
-ALTERNATE(C, 0x0C00, 7, MODULE_UART, 0) /* USART3: PC10/PC11 */
-ALTERNATE(A, 0xC600, 4, MODULE_I2C, 0) /* I2C SLAVE:PA9/10 MASTER:PA14/15 */
-ALTERNATE(A, 0x1800,14, MODULE_USB, 0) /* USB: PA11/12 */
+ALTERNATE(B, 0x0008, 0, MODULE_USB_PD, 0) /* SPI1: SCK(PB3) */
+ALTERNATE(B, 0x0002, 0, MODULE_USB_PD, 0) /* TIM14_CH1: PB1 */
+ALTERNATE(B, 0x00C0, 0, MODULE_UART, 0) /* USART1: PB6/PB7 */
+ALTERNATE(A, 0xC000, 1, MODULE_UART, GPIO_PULL_UP) /* USART2: PA14/PA15 */
+ALTERNATE(C, 0x0C00, 1, MODULE_UART, 0) /* USART3: PC10/PC11 */
+ALTERNATE(B, 0x0F00, 1, MODULE_I2C, 0) /* I2C SLAVE:PB10/11 MASTER:PB8/9 */
diff --git a/board/ryu_p2/usb_pd_config.h b/board/ryu_p1/usb_pd_config.h
index 374cb083d7..8adc002e8c 100644
--- a/board/ryu_p2/usb_pd_config.h
+++ b/board/ryu_p1/usb_pd_config.h
@@ -14,15 +14,15 @@
#define TASK_ID_TO_PORT(id) 0
/* Timer selection for baseband PD communication */
-#define TIM_CLOCK_PD_TX_C0 3
-#define TIM_CLOCK_PD_RX_C0 2
+#define TIM_CLOCK_PD_TX_C0 14
+#define TIM_CLOCK_PD_RX_C0 1
#define TIM_CLOCK_PD_TX(p) TIM_CLOCK_PD_TX_C0
#define TIM_CLOCK_PD_RX(p) TIM_CLOCK_PD_RX_C0
/* Timer channel */
-#define TIM_RX_CCR_C0 4
-#define TIM_TX_CCR_C0 4
+#define TIM_RX_CCR_C0 1
+#define TIM_TX_CCR_C0 1
/* RX timer capture/compare register */
#define TIM_CCR_C0 (&STM32_TIM_CCRx(TIM_CLOCK_PD_RX_C0, TIM_RX_CCR_C0))
@@ -37,7 +37,7 @@
/* use the hardware accelerator for CRC */
#define CONFIG_HW_CRC
-/* TX is using SPI1 on PA6, PB3, and PB5 */
+/* TX is using SPI1 on PB3-5 */
#define SPI_REGS(p) STM32_SPI1_REGS
static inline void spi_enable_clock(int port)
@@ -47,9 +47,9 @@ static inline void spi_enable_clock(int port)
#define DMAC_SPI_TX(p) STM32_DMAC_CH3
-/* RX is using COMP1 triggering TIM2 CH4 */
-#define CMP1OUTSEL STM32_COMP_CMP1OUTSEL_TIM2_IC4
-#define CMP2OUTSEL STM32_COMP_CMP2OUTSEL_TIM2_IC4
+/* RX is using COMP1 triggering TIM1 CH1 */
+#define CMP1OUTSEL STM32_COMP_CMP1OUTSEL_TIM1_IC1
+#define CMP2OUTSEL STM32_COMP_CMP2OUTSEL_TIM1_IC1
#define TIM_TX_CCR_IDX(p) TIM_TX_CCR_C0
#define TIM_RX_CCR_IDX(p) TIM_RX_CCR_C0
@@ -59,14 +59,14 @@ static inline void spi_enable_clock(int port)
/* triggers packet detection on comparator falling edge */
#define EXTI_XTSR STM32_EXTI_FTSR
-#define DMAC_TIM_RX(p) STM32_DMAC_CH7
+#define DMAC_TIM_RX(p) STM32_DMAC_CH2
/* the pins used for communication need to be hi-speed */
static inline void pd_set_pins_speed(int port)
{
/* 40 MHz pin speed on SPI MISO PA6 */
STM32_GPIO_OSPEEDR(GPIO_A) |= 0x00003000;
- /* 40 MHz pin speed on TIM3_CH4 (PB1) */
+ /* 40 MHz pin speed on TIM14_CH1 (PB1) */
STM32_GPIO_OSPEEDR(GPIO_B) |= 0x0000000C;
}
@@ -82,7 +82,7 @@ static inline void pd_tx_spi_reset(int port)
static inline void pd_tx_enable(int port, int polarity)
{
/* put SPI function on TX pin : PA6 is SPI MISO */
- gpio_set_alternate_function(GPIO_A, 0x0040, 5);
+ gpio_set_alternate_function(GPIO_A, 0x0040, 0);
/* set the low level reference */
gpio_set_level(GPIO_USBC_CC_TX_EN, 1);
diff --git a/board/ryu_p2/usb_pd_policy.c b/board/ryu_p1/usb_pd_policy.c
index fc55246837..23400e7a8b 100644
--- a/board/ryu_p2/usb_pd_policy.c
+++ b/board/ryu_p1/usb_pd_policy.c
@@ -162,3 +162,54 @@ int pd_power_swap(int port)
/* Always allow power swap */
return 1;
}
+/* ----------------- Vendor Defined Messages ------------------ */
+static int pd_custom_vdm(int port, int cnt, uint32_t *payload,
+ uint32_t **rpayload)
+{
+ int cmd = PD_VDO_CMD(payload[0]);
+ uint16_t dev_id = 0;
+ CPRINTF("VDM/%d [%d] %08x\n", cnt, cmd, payload[0]);
+
+ /* make sure we have some payload */
+ if (cnt == 0)
+ return 0;
+
+ switch (cmd) {
+ case VDO_CMD_VERSION:
+ /* guarantee last byte of payload is null character */
+ *(payload + cnt - 1) = 0;
+ CPRINTF("version: %s\n", (char *)(payload+1));
+ break;
+ case VDO_CMD_READ_INFO:
+ case VDO_CMD_SEND_INFO:
+ /* if last word is present, it contains lots of info */
+ if (cnt == 7) {
+ /* TODO: Notify host */
+ dev_id = VDO_INFO_HW_DEV_ID(payload[6]);
+ CPRINTF("Dev:0x%04x SW:%d RW:%d\n", dev_id,
+ VDO_INFO_SW_DBG_VER(payload[6]),
+ VDO_INFO_IS_RW(payload[6]));
+ }
+ /* copy hash */
+ if (cnt >= 6)
+ pd_dev_store_rw_hash(port, dev_id, payload + 1);
+
+ break;
+ case VDO_CMD_CURRENT:
+ CPRINTF("Current: %dmA\n", payload[1]);
+ break;
+ case VDO_CMD_FLIP:
+ board_flip_usb_mux(0);
+ break;
+ }
+
+ return 0;
+}
+
+int pd_vdm(int port, int cnt, uint32_t *payload, uint32_t **rpayload)
+{
+ if (PD_VDO_SVDM(payload[0]))
+ return pd_svdm(port, cnt, payload, rpayload);
+ else
+ return pd_custom_vdm(port, cnt, payload, rpayload);
+}
diff --git a/common/lb_common.c b/common/lb_common.c
index 2e04a2fabd..6bd3ac5ec3 100644
--- a/common/lb_common.c
+++ b/common/lb_common.c
@@ -62,7 +62,7 @@ static inline uint8_t controller_read(int ctrl_num, uint8_t reg)
#define MAX_GREEN 0x30
#define MAX_BLUE 0x67
#endif
-#if defined(BOARD_SAMUS) || defined(BOARD_RYU_P2)
+#if defined(BOARD_SAMUS) || defined(BOARD_RYU)
/* Samus uses completely different LEDs, so the numbers are different. The
* Samus LEDs can handle much higher currents, but these constants were
* calibrated to provide uniform intensity at the level used by Link.
@@ -123,7 +123,7 @@ static const uint8_t led_to_isc[] = { 0x18, 0x15, 0x18, 0x15 };
#ifdef BOARD_SAMUS
static const uint8_t led_to_isc[] = { 0x15, 0x18, 0x15, 0x18 };
#endif
-#ifdef BOARD_RYU_P2
+#ifdef BOARD_RYU
static const uint8_t led_to_isc[] = { 0x18, 0x15, 0x18, 0x15 };
#endif
#ifdef BOARD_HOST
diff --git a/util/flash_ec b/util/flash_ec
index 10d924f0be..50bb8cd860 100755
--- a/util/flash_ec
+++ b/util/flash_ec
@@ -73,7 +73,7 @@ BOARDS_STM32=(
plankton
ryu
ryu_sh
- ryu_p2
+ ryu_p1
samus_pd
snow
spring