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authorVic Yang <victoryang@chromium.org>2014-08-25 15:12:34 -0700
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2014-08-26 21:02:49 +0000
commitb22c10ce2e5d8186cff4623dbf6fb18ee6a62017 (patch)
tree3f2ef8edc81892b38e098be471f8355482d5786b
parent687f9032d1a30455da1b86b8878e91127539be46 (diff)
downloadchrome-ec-b22c10ce2e5d8186cff4623dbf6fb18ee6a62017.tar.gz
ryu: gate SCL to PI3USB9281
As a short term workaround for the I2C problem of PI3USB9281, we're gating its SCL input when it's not addressed. This workaround will be removed once we have the silicon fix. BUG=chrome-os-partner:31526 TEST=Sanity check on P0 boards. BRANCH=None Change-Id: I57daf25f2ad2d94ac7e4192050b4d6bbdae9d51d Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/214064 Reviewed-by: Randall Spangler <rspangler@chromium.org>
-rw-r--r--board/ryu/board.h8
-rw-r--r--board/ryu/gpio.inc3
-rw-r--r--chip/stm32/i2c-stm32f0.c12
-rw-r--r--include/config.h11
4 files changed, 34 insertions, 0 deletions
diff --git a/board/ryu/board.h b/board/ryu/board.h
index ffeda6f743..768f71fb1e 100644
--- a/board/ryu/board.h
+++ b/board/ryu/board.h
@@ -35,6 +35,14 @@
#undef CONFIG_CONSOLE_CMDHELP
#define CONFIG_INDUCTIVE_CHARGING
+/*
+ * Pericom I2C workaround
+ * TODO(crosbug.com/p/31529): Remove this.
+ */
+#define CONFIG_I2C_SCL_GATE_PORT I2C_PORT_MASTER
+#define CONFIG_I2C_SCL_GATE_ADDR 0x4a
+#define CONFIG_I2C_SCL_GATE_GPIO GPIO_PERICOM_CLK_EN
+
/* Charging/Power configuration */
#undef CONFIG_BATTERY_RYU /* TODO implement */
#define CONFIG_BATTERY_BQ27541
diff --git a/board/ryu/gpio.inc b/board/ryu/gpio.inc
index b7579ebdb3..979722b450 100644
--- a/board/ryu/gpio.inc
+++ b/board/ryu/gpio.inc
@@ -90,6 +90,9 @@ GPIO(MASTER_I2C_SDA, B, 9, GPIO_INPUT, NULL)
GPIO(SLAVE_I2C_SCL, B, 10, GPIO_INPUT, NULL)
GPIO(SLAVE_I2C_SDA, B, 11, GPIO_INPUT, NULL)
+/* SCL gating for PI3USB9281 */
+GPIO(PERICOM_CLK_EN, C, 15, GPIO_OUT_LOW, NULL)
+
/* Case closed debugging. */
GPIO(PD_DISABLE_DEBUG, C, 5, GPIO_OUT_HIGH, NULL)
GPIO(SPI_FLASH_NSS, B, 12, GPIO_INPUT, NULL)
diff --git a/chip/stm32/i2c-stm32f0.c b/chip/stm32/i2c-stm32f0.c
index c6cfa9e156..8db1d97f2d 100644
--- a/chip/stm32/i2c-stm32f0.c
+++ b/chip/stm32/i2c-stm32f0.c
@@ -291,6 +291,12 @@ int i2c_xfer(int port, int slave_addr, const uint8_t *out, int out_bytes,
int rv = EC_SUCCESS;
int i;
+#if defined(CONFIG_I2C_SCL_GATE_ADDR) && defined(CONFIG_I2C_SCL_GATE_PORT)
+ if (port == CONFIG_I2C_SCL_GATE_PORT &&
+ slave_addr == CONFIG_I2C_SCL_GATE_ADDR)
+ gpio_set_level(CONFIG_I2C_SCL_GATE_GPIO, 1);
+#endif
+
ASSERT(out || !out_bytes);
ASSERT(in || !in_bytes);
@@ -367,6 +373,12 @@ xfer_exit:
STM32_I2C_CR1(port) |= STM32_I2C_CR1_PE;
}
+#ifdef CONFIG_I2C_SCL_GATE_ADDR
+ if (port == CONFIG_I2C_SCL_GATE_PORT &&
+ slave_addr == CONFIG_I2C_SCL_GATE_ADDR)
+ gpio_set_level(CONFIG_I2C_SCL_GATE_GPIO, 0);
+#endif
+
return rv;
}
diff --git a/include/config.h b/include/config.h
index 8337c8ca03..1221a6f6bc 100644
--- a/include/config.h
+++ b/include/config.h
@@ -569,6 +569,17 @@
#undef CONFIG_I2C_PASSTHROUGH
#undef CONFIG_I2C_PASSTHRU_RESTRICTED
+/*
+ * I2C SCL gating.
+ *
+ * If CONFIG_I2C_SCL_GATE_ADDR/PORT is defined, whenever the defined address
+ * is addressed, CONFIG_I2C_SCL_GATE_GPIO is set to high. When the I2C
+ * transaction is done, the pin is set back to low.
+ */
+#undef CONFIG_I2C_SCL_GATE_PORT
+#undef CONFIG_I2C_SCL_GATE_ADDR
+#undef CONFIG_I2C_SCL_GATE_GPIO
+
/*****************************************************************************/
/* Inductive charging */