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authorRandall Spangler <rspangler@chromium.org>2013-05-21 11:03:29 -0700
committerChromeBot <chrome-bot@google.com>2013-05-23 11:08:44 -0700
commita1006865e7f695ddd1c730cc9c6c6a6f109c43b9 (patch)
tree70f68e84e2340b7bf4210de177ee000ece27fda0
parentbd8fec9bae8fc36cc1e46bf0417f2da00530b522 (diff)
downloadchrome-ec-a1006865e7f695ddd1c730cc9c6c6a6f109c43b9.tar.gz
Move write protect GPIO handling to flash module
Write protect signal naming is now consistent across boards. New CONFIG_WP_ACTIVE_HIGH is present on systems where the write protect signal is active-high (e.g. Link). This will be used in the next CL, which moves flash_get_protect() to flash_common.c BUG=chrome-os-partner:15613 BRANCH=none TEST=flashinfo properly reports WP signal status Change-Id: I502ab033c3eb36661cc3ee97320874b3fbf6fc0d Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/56087 Reviewed-by: Vic Yang <victoryang@chromium.org>
-rw-r--r--board/bds/board.c2
-rw-r--r--board/bds/board.h5
-rw-r--r--board/link/board.c2
-rw-r--r--board/link/board.h3
-rw-r--r--board/mccroskey/board.h2
-rw-r--r--board/slippy/board.c2
-rw-r--r--board/slippy/board.h3
-rw-r--r--board/snow/board.h2
-rw-r--r--board/spring/board.h2
-rw-r--r--chip/lm4/flash.c12
-rw-r--r--chip/lm4/switch.c10
-rw-r--r--chip/stm32/flash-stm32f100.c10
-rw-r--r--chip/stm32/flash-stm32l15x.c13
-rw-r--r--common/x86_power_haswell.c2
-rw-r--r--include/flash.h5
-rw-r--r--test/flash.c6
16 files changed, 51 insertions, 30 deletions
diff --git a/board/bds/board.c b/board/bds/board.c
index 92372437a5..d0808f4f37 100644
--- a/board/bds/board.c
+++ b/board/bds/board.c
@@ -43,6 +43,6 @@ const struct gpio_info gpio_list[GPIO_COUNT] = {
{"RECOVERYn", LM4_GPIO_D, (1<<1), GPIO_PULL_UP, NULL},
{"DEBUG_LED", LM4_GPIO_A, (1<<7), GPIO_OUT_LOW, NULL},
/* Unimplemented signals which we need to emulate for now */
- GPIO_SIGNAL_NOT_IMPLEMENTED("WRITE_PROTECT"),
+ GPIO_SIGNAL_NOT_IMPLEMENTED("WP"),
GPIO_SIGNAL_NOT_IMPLEMENTED("ENTERING_RW"),
};
diff --git a/board/bds/board.h b/board/bds/board.h
index 770269a9b4..0abb267637 100644
--- a/board/bds/board.h
+++ b/board/bds/board.h
@@ -21,6 +21,9 @@
#define CONFIG_EOPTION
#define CONFIG_PSTORE
+/* Write protect is active high */
+#define CONFIG_WP_ACTIVE_HIGH
+
#ifndef __ASSEMBLER__
enum adc_channel
@@ -46,7 +49,7 @@ enum gpio_signal {
GPIO_DEBUG_LED, /* Debug LED */
/* Signals which aren't implemented on BDS but we'll emulate anyway, to
* make it more convenient to debug other code. */
- GPIO_WRITE_PROTECT, /* Write protect input */
+ GPIO_WP, /* Write protect input */
GPIO_ENTERING_RW, /* EC entering RW code */
/* Number of GPIOs; not an actual GPIO */
diff --git a/board/link/board.c b/board/link/board.c
index e5eca5a79a..e3cb7522ad 100644
--- a/board/link/board.c
+++ b/board/link/board.c
@@ -73,7 +73,7 @@ const struct gpio_info gpio_list[GPIO_COUNT] = {
switch_interrupt},
{"USB1_STATUS_L", LM4_GPIO_E, (1<<7), 0, NULL},
{"USB2_STATUS_L", LM4_GPIO_E, (1<<1), 0, NULL},
- {"WRITE_PROTECT", LM4_GPIO_J, (1<<4), GPIO_INT_BOTH,
+ {"WP", LM4_GPIO_J, (1<<4), GPIO_INT_BOTH,
switch_interrupt},
/* Outputs; all unasserted by default except for reset signals */
{"CPU_PROCHOT", LM4_GPIO_F, (1<<2), GPIO_OUT_LOW, NULL},
diff --git a/board/link/board.h b/board/link/board.h
index b391fbaab6..4623d684ad 100644
--- a/board/link/board.h
+++ b/board/link/board.h
@@ -39,6 +39,7 @@
#define CONFIG_TEMP_SENSOR
#define CONFIG_TMP006
#define CONFIG_USB_PORT_POWER_SMART
+#define CONFIG_WP_ACTIVE_HIGH
#ifndef __ASSEMBLER__
@@ -128,7 +129,7 @@ enum gpio_signal {
GPIO_RECOVERY_L, /* Recovery signal from servo */
GPIO_USB1_STATUS_L, /* USB charger port 1 status output */
GPIO_USB2_STATUS_L, /* USB charger port 2 status output */
- GPIO_WRITE_PROTECT, /* Write protect input */
+ GPIO_WP, /* Write protect input */
/* Outputs */
GPIO_CPU_PROCHOT, /* Force CPU to think it's overheated */
GPIO_ENABLE_1_5V_DDR, /* Enable +1.5V_DDR supply */
diff --git a/board/mccroskey/board.h b/board/mccroskey/board.h
index 8620f73e87..a290ddc691 100644
--- a/board/mccroskey/board.h
+++ b/board/mccroskey/board.h
@@ -85,7 +85,7 @@ enum gpio_signal {
GPIO_KB_OUT12,
GPIO_USB_VBUS_CTRL,
GPIO_HUB_RESET,
- GPIO_WRITE_PROTECTn,
+ GPIO_WP_L,
/* FIXME: this will be an alt. function GPIO, so remove it from here */
GPIO_BL_PWM,
diff --git a/board/slippy/board.c b/board/slippy/board.c
index 55f1d4a8d8..0bea0d102f 100644
--- a/board/slippy/board.c
+++ b/board/slippy/board.c
@@ -56,7 +56,7 @@ const struct gpio_info gpio_list[GPIO_COUNT] = {
x86_power_interrupt},
{"RECOVERY_L", LM4_GPIO_A, (1<<5), GPIO_PULL_UP|GPIO_INT_BOTH,
switch_interrupt},
- {"WRITE_PROTECT", LM4_GPIO_A, (1<<4), GPIO_INT_BOTH,
+ {"WP", LM4_GPIO_A, (1<<4), GPIO_INT_BOTH,
switch_interrupt},
/* Other inputs */
diff --git a/board/slippy/board.h b/board/slippy/board.h
index 883d6fcb7f..53a6c3a672 100644
--- a/board/slippy/board.h
+++ b/board/slippy/board.h
@@ -33,6 +33,7 @@
#define CONFIG_PWM_FAN
#define CONFIG_TEMP_SENSOR
#define CONFIG_USB_PORT_POWER_DUMB
+#define CONFIG_WP_ACTIVE_HIGH
#ifndef __ASSEMBLER__
@@ -80,7 +81,7 @@ enum gpio_signal {
GPIO_VCORE_PGOOD, /* Power good on core VR */
GPIO_PCH_EDP_VDD_EN, /* PCH wants EDP enabled */
GPIO_RECOVERY_L, /* Recovery signal from servo */
- GPIO_WRITE_PROTECT, /* Write protect input */
+ GPIO_WP, /* Write protect input */
/* Other inputs */
GPIO_FAN_ALERT_L, /* From thermal sensor */
diff --git a/board/snow/board.h b/board/snow/board.h
index 517509abcb..83b7a3c65d 100644
--- a/board/snow/board.h
+++ b/board/snow/board.h
@@ -76,7 +76,7 @@ enum gpio_signal {
GPIO_CHARGER_INT,
GPIO_LID_OPEN, /* LID switch detection */
GPIO_SUSPEND_L, /* AP suspend/resume state */
- GPIO_WRITE_PROTECTn, /* Write protection pin (low active) */
+ GPIO_WP_L, /* Write protection pin (low active) */
/* Keyboard inputs */
GPIO_KB_IN00,
GPIO_KB_IN01,
diff --git a/board/spring/board.h b/board/spring/board.h
index 44256b4e21..3c342db10a 100644
--- a/board/spring/board.h
+++ b/board/spring/board.h
@@ -86,7 +86,7 @@ enum gpio_signal {
GPIO_CHARGER_INT,
GPIO_LID_OPEN, /* LID switch detection */
GPIO_SUSPEND_L, /* AP suspend/resume state */
- GPIO_WRITE_PROTECTn, /* Write protection pin (low active) */
+ GPIO_WP_L, /* Write protection pin (low active) */
/* Keyboard inputs */
GPIO_KB_IN00,
GPIO_KB_IN01,
diff --git a/chip/lm4/flash.c b/chip/lm4/flash.c
index f7a08d67dd..2a8e45c1b6 100644
--- a/chip/lm4/flash.c
+++ b/chip/lm4/flash.c
@@ -6,6 +6,7 @@
/* Flash memory module for Chrome EC */
#include "flash.h"
+#include "gpio.h"
#include "registers.h"
#include "switch.h"
#include "system.h"
@@ -176,6 +177,11 @@ int flash_physical_get_protect(int bank)
return (LM4_FLASH_FMPPE[F_BANK(bank)] & F_BIT(bank)) ? 0 : 1;
}
+int flash_physical_get_all_protect_now(void)
+{
+ return all_protected;
+}
+
/*****************************************************************************/
/* High-level APIs */
@@ -186,18 +192,16 @@ uint32_t flash_get_protect(void)
int i;
/* Read all-protected state from our shadow copy */
- if (all_protected)
+ if (flash_physical_get_all_protect_now())
flags |= EC_FLASH_PROTECT_ALL_NOW;
/* Read the current persist state from flash */
if (flash_get_protect_ro_at_boot())
flags |= EC_FLASH_PROTECT_RO_AT_BOOT;
-#ifdef HAS_TASK_SWITCH
/* Check if write protect pin is asserted now */
- if (switch_get_write_protect())
+ if (gpio_get_level(GPIO_WP))
flags |= EC_FLASH_PROTECT_GPIO_ASSERTED;
-#endif
/* Scan flash protection */
for (i = 0; i < PHYSICAL_BANKS; i++) {
diff --git a/chip/lm4/switch.c b/chip/lm4/switch.c
index 57d8dffa88..3cfb4e8568 100644
--- a/chip/lm4/switch.c
+++ b/chip/lm4/switch.c
@@ -9,6 +9,7 @@
#include "chipset.h"
#include "common.h"
#include "console.h"
+#include "flash.h"
#include "gpio.h"
#include "hooks.h"
#include "host_command.h"
@@ -119,7 +120,7 @@ static void update_other_switches(void)
if (!memmap_switches)
return;
- if (gpio_get_level(GPIO_WRITE_PROTECT) == 0)
+ if ((flash_get_protect() & EC_FLASH_PROTECT_GPIO_ASSERTED) == 0)
*memmap_switches |= EC_SWITCH_WRITE_PROTECT_DISABLED;
else
*memmap_switches &= ~EC_SWITCH_WRITE_PROTECT_DISABLED;
@@ -230,11 +231,6 @@ static void set_initial_pwrbtn_state(void)
}
}
-int switch_get_write_protect(void)
-{
- return gpio_get_level(GPIO_WRITE_PROTECT);
-}
-
/*****************************************************************************/
/* Task / state machine */
@@ -420,7 +416,7 @@ static void switch_init(void)
/* Enable interrupts, now that we've initialized */
gpio_enable_interrupt(GPIO_POWER_BUTTON_L);
gpio_enable_interrupt(GPIO_RECOVERY_L);
- gpio_enable_interrupt(GPIO_WRITE_PROTECT);
+ gpio_enable_interrupt(GPIO_WP);
}
DECLARE_HOOK(HOOK_INIT, switch_init, HOOK_PRIO_DEFAULT);
diff --git a/chip/stm32/flash-stm32f100.c b/chip/stm32/flash-stm32f100.c
index 8343b82f37..6ac5706f30 100644
--- a/chip/stm32/flash-stm32f100.c
+++ b/chip/stm32/flash-stm32f100.c
@@ -349,6 +349,11 @@ static int flash_physical_get_protect_at_boot(int block)
return (!(val & (1 << (block % 8)))) ? 1 : 0;
}
+int flash_physical_get_all_protect_now(void)
+{
+ return entire_flash_locked;
+}
+
int flash_physical_set_protect_at_boot(int start_bank, int bank_count,
int enable)
{
@@ -490,16 +495,15 @@ uint32_t flash_get_protect(void)
int i;
int not_protected[2] = {0};
- if (!gpio_get_level(GPIO_WRITE_PROTECTn))
+ if (!gpio_get_level(GPIO_WP_L))
flags |= EC_FLASH_PROTECT_GPIO_ASSERTED;
/* Read the current persist state from flash */
if (flash_get_protect_ro_at_boot())
flags |= EC_FLASH_PROTECT_RO_AT_BOOT;
- if (entire_flash_locked) {
+ if (flash_physical_get_all_protect_now())
flags |= EC_FLASH_PROTECT_ALL_NOW;
- }
/* Scan flash protection */
for (i = 0; i < PHYSICAL_BANKS; i++) {
diff --git a/chip/stm32/flash-stm32l15x.c b/chip/stm32/flash-stm32l15x.c
index d119dbb41c..42c9bc23d0 100644
--- a/chip/stm32/flash-stm32l15x.c
+++ b/chip/stm32/flash-stm32l15x.c
@@ -378,6 +378,17 @@ int flash_physical_force_reload(void)
return EC_ERROR_UNKNOWN;
}
+int flash_physical_get_all_protect_now(void)
+{
+ int rv = 0;
+
+ if (unlock(STM32_FLASH_PECR_PE_LOCK))
+ rv = 1;
+ lock(0);
+
+ return rv;
+}
+
uint32_t flash_get_protect(void)
{
uint32_t flags = 0;
@@ -424,7 +435,7 @@ uint32_t flash_get_protect(void)
}
/* If we can't unlock, all flash is protected now */
- if (unlock(STM32_FLASH_PECR_PE_LOCK))
+ if (flash_physical_get_all_protect_now())
flags |= EC_FLASH_PROTECT_ALL_NOW;
lock(0);
diff --git a/common/x86_power_haswell.c b/common/x86_power_haswell.c
index 9185053174..b6759da087 100644
--- a/common/x86_power_haswell.c
+++ b/common/x86_power_haswell.c
@@ -383,8 +383,6 @@ static void x86_power_init(void)
gpio_enable_interrupt(GPIO_PP5000_PGOOD);
gpio_enable_interrupt(GPIO_VCORE_PGOOD);
gpio_enable_interrupt(GPIO_PCH_EDP_VDD_EN);
- gpio_enable_interrupt(GPIO_RECOVERY_L);
- gpio_enable_interrupt(GPIO_WRITE_PROTECT);
}
DECLARE_HOOK(HOOK_INIT, x86_power_init, HOOK_PRIO_INIT_CHIPSET);
diff --git a/include/flash.h b/include/flash.h
index 8969a56c8b..8f842cc6d1 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -88,6 +88,11 @@ int flash_physical_erase(int offset, int size);
int flash_physical_get_protect(int bank);
/**
+ * Return non-zero if entire flash is locked for the current boot.
+ */
+int flash_physical_get_all_protect_now(void);
+
+/**
* Set physical write protect status for the next boot.
*
* @param start_bank Start bank
diff --git a/test/flash.c b/test/flash.c
index 02144e756c..5db8a6196c 100644
--- a/test/flash.c
+++ b/test/flash.c
@@ -66,11 +66,9 @@ int gpio_get_level(enum gpio_signal signal)
if (mock_wp == -1)
mock_wp = !!(system_get_scratchpad() & TEST_STATE_BOOT_WP_ON);
- if (strcasecmp(name, "WRITE_PROTECTn") == 0 ||
- strcasecmp(name, "WP_L") == 0)
+ if (strcasecmp(name, "WP_L") == 0)
return !mock_wp;
- if (strcasecmp(name, "WRITE_PROTECT") == 0 ||
- strcasecmp(name, "WP") == 0)
+ if (strcasecmp(name, "WP") == 0)
return mock_wp;
/* Signal other than write protect. Just return 0. */