Clean up flash section defines and increase lm4 image size

The firmware defines had two almost-identical sets.  Coalesce into one
consistent set.

Link had 256 KB flash, but only allowed 2 80KB images.  Future
LM4-based platforms (slippy/peppy/falco/etc) will now use the entire
flash, with RO=124KB, pstate=4KB, RW=128KB.  This matches what the
STM32 platforms do, where pstate is contiguous with the RO firmware.

No functional change to STM32-based platforms.

BUG=chrome-os-partner:19176
BRANCH=none
TEST=build all platforms and dump_fmap ec.bin.
  - stm32-based platforms should report RO=61440@0, RW=65536@0x10000
  - link should report RO=81920@0, RW=81920@0x14000
  - slippy should report RO=129024@0, RW=131072@0x20000

Change-Id: I20b1d95c16250d9a5d228ead06eef03d96548823
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56655

14 files changed, 143 insertions, 117 deletions

diff --git a/board/link/board.h b/board/link/board.h
index 4623d684ad..aad7abc0cf 100644
--- a/board/link/board.h
+++ b/board/link/board.h
@@ -41,6 +41,10 @@
 #define CONFIG_USB_PORT_POWER_SMART
 #define CONFIG_WP_ACTIVE_HIGH
 
+/* Link uses 2 80KB images, with PSTATE at the end instead of following RO */
+#define CONFIG_FW_IMAGE_SIZE (80 * 1024)
+#define CONFIG_PSTATE_AT_END
+
 #ifndef __ASSEMBLER__
 
 /* Fan PWM channels */
diff --git a/chip/host/config.h b/chip/host/config.h
index 7f2df4e467..c296e1b7cc 100644
--- a/chip/host/config.h
+++ b/chip/host/config.h
@@ -22,24 +22,18 @@
 #define CONFIG_FW_IMAGE_SIZE    (64 * 1024)
 
 #define CONFIG_FW_RO_OFF        0
-#define CONFIG_FW_RO_SIZE       (CONFIG_FW_IMAGE_SIZE \
-				 - CONFIG_SECTION_FLASH_PSTATE_SIZE)
+#define CONFIG_FW_RO_SIZE       (CONFIG_FW_IMAGE_SIZE - CONFIG_FW_PSTATE_SIZE)
 #define CONFIG_FW_RW_OFF        CONFIG_FW_IMAGE_SIZE
 #define CONFIG_FW_RW_SIZE       CONFIG_FW_IMAGE_SIZE
-
-#define CONFIG_SECTION_RO_OFF   CONFIG_FW_RO_OFF
-#define CONFIG_SECTION_RO_SIZE  CONFIG_FW_RO_SIZE
-#define CONFIG_SECTION_RW_OFF   CONFIG_FW_RW_OFF
-#define CONFIG_SECTION_RW_SIZE  CONFIG_FW_RW_SIZE
-#define CONFIG_SECTION_WP_RO_OFF   CONFIG_FW_RO_OFF
-#define CONFIG_SECTION_WP_RO_SIZE  CONFIG_FW_IMAGE_SIZE
+#define CONFIG_FW_WP_RO_OFF     CONFIG_FW_RO_OFF
+#define CONFIG_FW_WP_RO_SIZE    CONFIG_FW_IMAGE_SIZE
 
 /*
- * Put this after RO to give RW more space. This also makes RO write protect
- * region contiguous.
+ * Put this after RO to give RW more space and make RO write protect region
+ * contiguous.
  */
-#define CONFIG_SECTION_FLASH_PSTATE_SIZE  (1 * CONFIG_FLASH_BANK_SIZE)
-#define CONFIG_SECTION_FLASH_PSTATE_OFF   CONFIG_FW_RO_OFF + CONFIG_FW_RO_SIZE
+#define CONFIG_FW_PSTATE_OFF    CONFIG_FW_RO_SIZE
+#define CONFIG_FW_PSTATE_SIZE   CONFIG_FLASH_BANK_SIZE
 
 /* Maximum number of deferrable functions */
 #define DEFERRABLE_MAX_COUNT 8
diff --git a/chip/lm4/config.h b/chip/lm4/config.h
index 95727c0c84..609a88ae90 100644
--- a/chip/lm4/config.h
+++ b/chip/lm4/config.h
@@ -51,37 +51,46 @@
  * permanent, it can't be undone easily enough to support RMA. */
 #define CONFIG_FLASH_PHYSICAL_SIZE  0x00040000
 
-/* This is the size that we pretend we have. This is what flashrom expects,
- * what the FMAP reports, and what size we build images for. */
-#define CONFIG_FLASH_SIZE (CONFIG_FLASH_PHYSICAL_SIZE - CONFIG_FLASH_BANK_SIZE)
-
 /****************************************************************************/
 /* Define our flash layout. */
 
+/* Size of one firmware image in flash */
+#ifndef CONFIG_FW_IMAGE_SIZE
+#define CONFIG_FW_IMAGE_SIZE		(CONFIG_FLASH_PHYSICAL_SIZE / 2)
+#endif
+
+/* RO firmware must start at beginning of flash */
+#define CONFIG_FW_RO_OFF		0
+
 /*
- * The EC uses the top bank of flash to emulate a SPI-like write protect
- * register with persistent state.  Put that up at the top.
+ * The EC uses the one bank of flash to emulate a SPI-like write protect
+ * register with persistent state.
  */
-#define CONFIG_SECTION_FLASH_PSTATE_SIZE  (1 * CONFIG_FLASH_BANK_SIZE)
-#define CONFIG_SECTION_FLASH_PSTATE_OFF   (CONFIG_FLASH_PHYSICAL_SIZE \
-					   - CONFIG_SECTION_FLASH_PSTATE_SIZE)
-
-/* Then there are the two major sections. */
-/* TODO: Increase to 128KB, or shrink to 64KB? */
-#define CONFIG_SECTION_RO_SIZE	    (40 * CONFIG_FLASH_BANK_SIZE)
-#define CONFIG_SECTION_RO_OFF       CONFIG_FLASH_BASE
-
-#define CONFIG_SECTION_RW_SIZE       (40 * CONFIG_FLASH_BANK_SIZE)
-#define CONFIG_SECTION_RW_OFF        (CONFIG_SECTION_RO_OFF \
-					+ CONFIG_SECTION_RO_SIZE)
-
-#define CONFIG_SECTION_WP_RO_SIZE   (40 * CONFIG_FLASH_BANK_SIZE)
-#define CONFIG_SECTION_WP_RO_OFF    CONFIG_FLASH_BASE
-
-#define CONFIG_FW_RO_OFF            CONFIG_SECTION_RO_OFF
-#define CONFIG_FW_RO_SIZE           CONFIG_SECTION_RO_SIZE
-#define CONFIG_FW_RW_OFF            CONFIG_SECTION_RW_OFF
-#define CONFIG_FW_RW_SIZE           CONFIG_SECTION_RW_SIZE
+#define CONFIG_FW_PSTATE_SIZE		CONFIG_FLASH_BANK_SIZE
+
+#ifdef CONFIG_PSTATE_AT_END
+/* PSTATE is at end of flash */
+#define CONFIG_FW_RO_SIZE		CONFIG_FW_IMAGE_SIZE
+#define CONFIG_FW_PSTATE_OFF		(CONFIG_FLASH_PHYSICAL_SIZE	\
+					 - CONFIG_FW_PSTATE_SIZE)
+/* Don't claim PSTATE is part of flash */
+#define CONFIG_FLASH_SIZE		CONFIG_FW_PSTATE_OFF
+
+#else
+/* PSTATE immediately follows RO, in the first half of flash */
+#define CONFIG_FW_RO_SIZE		(CONFIG_FW_IMAGE_SIZE		\
+					 - CONFIG_FW_PSTATE_SIZE)
+#define CONFIG_FW_PSTATE_OFF		CONFIG_FW_RO_SIZE
+#define CONFIG_FLASH_SIZE		CONFIG_FLASH_PHYSICAL_SIZE
+#endif
+
+/* Either way, RW firmware is one firmware image offset from the start */
+#define CONFIG_FW_RW_OFF		CONFIG_FW_IMAGE_SIZE
+#define CONFIG_FW_RW_SIZE		CONFIG_FW_IMAGE_SIZE
+
+/* TODO: why 2 sets of configs with the same numbers? */
+#define CONFIG_FW_WP_RO_OFF		CONFIG_FW_RO_OFF
+#define CONFIG_FW_WP_RO_SIZE		CONFIG_FW_RO_SIZE
 
 /****************************************************************************/
 /* Customize the build */
diff --git a/chip/lm4/openocd/lm4x_cmds.tcl b/chip/lm4/openocd/lm4x_cmds.tcl
index dbac6a1392..31c16e5410 100644
--- a/chip/lm4/openocd/lm4x_cmds.tcl
+++ b/chip/lm4/openocd/lm4x_cmds.tcl
@@ -14,7 +14,6 @@ proc flash_lm4 {path offset} {
 	reset
 }
 
-# Link proto0 has 128KB flash; proto1+ have 256KB
 proc flash_link { } {
 	flash_lm4 ../../../build/link/ec.bin 0
 }
@@ -23,6 +22,7 @@ proc flash_link_ro { } {
 	flash_lm4 ../../../build/link/ec.RO.flat 0
 }
 
+# Link has 80KB images
 proc flash_link_rw { } {
 	flash_lm4 ../../../build/link/ec.RW.bin 81920
 }
@@ -35,6 +35,11 @@ proc flash_slippy { } {
 	flash_lm4 ../../../build/slippy/ec.bin 0
 }
 
+# Slippy/falco/peppy have 128KB images
+proc flash_slippy_rw { } {
+	flash_lm4 ../../../build/slippy/ec.RW.bin 131072
+}
+
 proc flash_falco { } {
 	flash_lm4 ../../../build/falco/ec.bin 0
 }
@@ -43,12 +48,20 @@ proc flash_peppy { } {
 	flash_lm4 ../../../build/peppy/ec.bin 0
 }
 
+# link has pstate in last sector
 proc unprotect_link { } {
 	reset halt
 	flash erase_sector 0 254 255
 	reset
 }
 
+# Slippy/peppy/falco have pstate following RO
+proc unprotect_slippy { } {
+	reset halt
+	flash erase_sector 0 126 127
+	reset
+}
+
 # Boot a software using internal RAM only
 
 proc ramboot_lm4 {path} {
diff --git a/chip/stm32/config-stm32f100.h b/chip/stm32/config-stm32f100.h
index ac9c12197d..b23814f4ad 100644
--- a/chip/stm32/config-stm32f100.h
+++ b/chip/stm32/config-stm32f100.h
@@ -17,24 +17,18 @@
 #define CONFIG_FW_IMAGE_SIZE    (64 * 1024)
 
 #define CONFIG_FW_RO_OFF        0
-#define CONFIG_FW_RO_SIZE       (CONFIG_FW_IMAGE_SIZE \
-				 - CONFIG_SECTION_FLASH_PSTATE_SIZE)
+#define CONFIG_FW_RO_SIZE       (CONFIG_FW_IMAGE_SIZE - CONFIG_FW_PSTATE_SIZE)
 #define CONFIG_FW_RW_OFF        CONFIG_FW_IMAGE_SIZE
 #define CONFIG_FW_RW_SIZE       CONFIG_FW_IMAGE_SIZE
-
-#define CONFIG_SECTION_RO_OFF   CONFIG_FW_RO_OFF
-#define CONFIG_SECTION_RO_SIZE  CONFIG_FW_RO_SIZE
-#define CONFIG_SECTION_RW_OFF   CONFIG_FW_RW_OFF
-#define CONFIG_SECTION_RW_SIZE  CONFIG_FW_RW_SIZE
-#define CONFIG_SECTION_WP_RO_OFF   CONFIG_FW_RO_OFF
-#define CONFIG_SECTION_WP_RO_SIZE  CONFIG_FW_IMAGE_SIZE
+#define CONFIG_FW_WP_RO_OFF     CONFIG_FW_RO_OFF
+#define CONFIG_FW_WP_RO_SIZE    CONFIG_FW_IMAGE_SIZE
 
 /*
- * Put this after RO to give RW more space. This also makes RO write protect
- * region contiguous.
+ * Put pstate after RO to give RW more space and make RO write protect region
+ * contiguous.
  */
-#define CONFIG_SECTION_FLASH_PSTATE_SIZE  (1 * CONFIG_FLASH_BANK_SIZE)
-#define CONFIG_SECTION_FLASH_PSTATE_OFF   CONFIG_FW_RO_OFF + CONFIG_FW_RO_SIZE
+#define CONFIG_FW_PSTATE_SIZE   CONFIG_FLASH_BANK_SIZE
+#define CONFIG_FW_PSTATE_OFF    (CONFIG_FW_RO_OFF + CONFIG_FW_RO_SIZE)
 
 /* Number of IRQ vectors on the NVIC */
 #define CONFIG_IRQ_COUNT 61
diff --git a/chip/stm32/config-stm32f10x.h b/chip/stm32/config-stm32f10x.h
index 23c7ba411b..71c512618c 100644
--- a/chip/stm32/config-stm32f10x.h
+++ b/chip/stm32/config-stm32f10x.h
@@ -17,24 +17,18 @@
 #define CONFIG_FW_IMAGE_SIZE    (64 * 1024)
 
 #define CONFIG_FW_RO_OFF        0
-#define CONFIG_FW_RO_SIZE       (CONFIG_FW_IMAGE_SIZE \
-				 - CONFIG_SECTION_FLASH_PSTATE_SIZE)
+#define CONFIG_FW_RO_SIZE       (CONFIG_FW_IMAGE_SIZE - CONFIG_FW_PSTATE_SIZE)
 #define CONFIG_FW_RW_OFF        CONFIG_FW_IMAGE_SIZE
 #define CONFIG_FW_RW_SIZE       CONFIG_FW_IMAGE_SIZE
-
-#define CONFIG_SECTION_RO_OFF   CONFIG_FW_RO_OFF
-#define CONFIG_SECTION_RO_SIZE  CONFIG_FW_RO_SIZE
-#define CONFIG_SECTION_RW_OFF   CONFIG_FW_RW_OFF
-#define CONFIG_SECTION_RW_SIZE  CONFIG_FW_RW_SIZE
-#define CONFIG_SECTION_WP_RO_OFF   CONFIG_FW_RO_OFF
-#define CONFIG_SECTION_WP_RO_SIZE  CONFIG_FW_IMAGE_SIZE
+#define CONFIG_FW_WP_RO_OFF     CONFIG_FW_RO_OFF
+#define CONFIG_FW_WP_RO_SIZE    CONFIG_FW_IMAGE_SIZE
 
 /*
- * Put this after RO to give RW more space. This also makes RO write protect
- * region contiguous.
+ * Put pstate after RO to give RW more space and make RO write protect region
+ * contiguous.
  */
-#define CONFIG_SECTION_FLASH_PSTATE_SIZE  (1 * CONFIG_FLASH_BANK_SIZE)
-#define CONFIG_SECTION_FLASH_PSTATE_OFF   (CONFIG_FW_RO_OFF + CONFIG_FW_RO_SIZE)
+#define CONFIG_FW_PSTATE_SIZE   CONFIG_FLASH_BANK_SIZE
+#define CONFIG_FW_PSTATE_OFF    (CONFIG_FW_RO_OFF + CONFIG_FW_RO_SIZE)
 
 /* Number of IRQ vectors on the NVIC */
 #define CONFIG_IRQ_COUNT 68
diff --git a/chip/stm32/config-stm32l15x.h b/chip/stm32/config-stm32l15x.h
index dda4ebc90f..eac9347ecb 100644
--- a/chip/stm32/config-stm32l15x.h
+++ b/chip/stm32/config-stm32l15x.h
@@ -17,25 +17,19 @@
 /* Size of one firmware image in flash */
 #define CONFIG_FW_IMAGE_SIZE    (64 * 1024)
 
-#define CONFIG_FW_RO_OFF         0
-#define CONFIG_FW_RO_SIZE        (CONFIG_FW_IMAGE_SIZE			\
-				  - CONFIG_SECTION_FLASH_PSTATE_SIZE)
-#define CONFIG_FW_RW_OFF         CONFIG_FW_IMAGE_SIZE
-#define CONFIG_FW_RW_SIZE        CONFIG_FW_IMAGE_SIZE
-
-#define CONFIG_SECTION_RO_OFF    CONFIG_FW_RO_OFF
-#define CONFIG_SECTION_RO_SIZE   CONFIG_FW_RO_SIZE
-#define CONFIG_SECTION_RW_OFF    CONFIG_FW_RW_OFF
-#define CONFIG_SECTION_RW_SIZE   CONFIG_FW_RW_SIZE
-#define CONFIG_SECTION_WP_RO_OFF   CONFIG_FW_RO_OFF
-#define CONFIG_SECTION_WP_RO_SIZE  CONFIG_FW_RO_SIZE
+#define CONFIG_FW_RO_OFF        0
+#define CONFIG_FW_RO_SIZE       (CONFIG_FW_IMAGE_SIZE - CONFIG_FW_PSTATE_SIZE)
+#define CONFIG_FW_RW_OFF        CONFIG_FW_IMAGE_SIZE
+#define CONFIG_FW_RW_SIZE       CONFIG_FW_IMAGE_SIZE
+#define CONFIG_FW_WP_RO_OFF     CONFIG_FW_RO_OFF
+#define CONFIG_FW_WP_RO_SIZE    CONFIG_FW_RO_SIZE
 
 /*
- * Put this after RO to give RW more space. This also makes RO write protect
+ * Put pstate after RO to give RW more space and make RO write protect
  * region contiguous.
  */
-#define CONFIG_SECTION_FLASH_PSTATE_SIZE  (1 * CONFIG_FLASH_BANK_SIZE)
-#define CONFIG_SECTION_FLASH_PSTATE_OFF   (CONFIG_FW_RO_OFF + CONFIG_FW_RO_SIZE)
+#define CONFIG_FW_PSTATE_SIZE  CONFIG_FLASH_BANK_SIZE
+#define CONFIG_FW_PSTATE_OFF   (CONFIG_FW_RO_OFF + CONFIG_FW_RO_SIZE)
 
 /* Number of IRQ vectors on the NVIC */
 #define CONFIG_IRQ_COUNT 45
diff --git a/common/firmware_image.lds.S b/common/firmware_image.lds.S
index 3cd806dce7..9df21d41f9 100644
--- a/common/firmware_image.lds.S
+++ b/common/firmware_image.lds.S
@@ -15,11 +15,11 @@ MEMORY
 SECTIONS
 {
     . = ALIGN(CONFIG_FLASH_BANK_SIZE);
-    .image.RO : AT(CONFIG_FLASH_BASE + CONFIG_SECTION_RO_OFF) {
+    .image.RO : AT(CONFIG_FLASH_BASE + CONFIG_FW_RO_OFF) {
         *(.image.RO)
     } > FLASH =0xff
     . = ALIGN(CONFIG_FLASH_BANK_SIZE);
-    .image.RW : AT(CONFIG_FLASH_BASE + CONFIG_SECTION_RW_OFF) {
+    .image.RW : AT(CONFIG_FLASH_BASE + CONFIG_FW_RW_OFF) {
         *(.image.RW)
         BYTE(0xEA)                      /* Mark end explicitly */
     } > FLASH =0xff
diff --git a/common/flash_common.c b/common/flash_common.c
index 430bcaead8..2192fa2e07 100644
--- a/common/flash_common.c
+++ b/common/flash_common.c
@@ -610,16 +610,16 @@ static int flash_command_region_info(struct host_cmd_handler_args *args)
 
 	switch (p->region) {
 	case EC_FLASH_REGION_RO:
-		r->offset = CONFIG_SECTION_RO_OFF;
-		r->size = CONFIG_SECTION_RO_SIZE;
+		r->offset = CONFIG_FW_RO_OFF;
+		r->size = CONFIG_FW_RO_SIZE;
 		break;
 	case EC_FLASH_REGION_RW:
-		r->offset = CONFIG_SECTION_RW_OFF;
-		r->size = CONFIG_SECTION_RW_SIZE;
+		r->offset = CONFIG_FW_RW_OFF;
+		r->size = CONFIG_FW_RW_SIZE;
 		break;
 	case EC_FLASH_REGION_WP_RO:
-		r->offset = CONFIG_SECTION_WP_RO_OFF;
-		r->size = CONFIG_SECTION_WP_RO_SIZE;
+		r->offset = CONFIG_FW_WP_RO_OFF;
+		r->size = CONFIG_FW_WP_RO_SIZE;
 		break;
 	default:
 		return EC_RES_INVALID_PARAM;
diff --git a/common/fmap.c b/common/fmap.c
index fa676936cb..cac3b61ca2 100644
--- a/common/fmap.c
+++ b/common/fmap.c
@@ -69,8 +69,8 @@ const struct _ec_fmap {
 			 * volatile data (ex, calibration results).
 			 */
 			.area_name = "EC_RO",
-			.area_offset = CONFIG_SECTION_RO_OFF,
-			.area_size = CONFIG_SECTION_RO_SIZE,
+			.area_offset = CONFIG_FW_RO_OFF,
+			.area_size = CONFIG_FW_RO_SIZE,
 			.area_flags = FMAP_AREA_STATIC | FMAP_AREA_RO,
 		},
 		{
@@ -108,8 +108,8 @@ const struct _ec_fmap {
 			 * EC_RO and aligned to hardware specification.
 			 */
 			.area_name = "WP_RO",
-			.area_offset = CONFIG_SECTION_WP_RO_OFF,
-			.area_size = CONFIG_SECTION_WP_RO_SIZE,
+			.area_offset = CONFIG_FW_WP_RO_OFF,
+			.area_size = CONFIG_FW_WP_RO_SIZE,
 			.area_flags = FMAP_AREA_STATIC | FMAP_AREA_RO,
 		},
 
@@ -117,8 +117,8 @@ const struct _ec_fmap {
 		{
 			 /* The range of RW firmware to be auto-updated. */
 			.area_name = "EC_RW",
-			.area_offset = CONFIG_SECTION_RW_OFF,
-			.area_size = CONFIG_SECTION_RW_SIZE,
+			.area_offset = CONFIG_FW_RW_OFF,
+			.area_size = CONFIG_FW_RW_SIZE,
 			.area_flags = FMAP_AREA_STATIC | FMAP_AREA_RO,
 		},
 		{
diff --git a/common/system_common.c b/common/system_common.c
index 4df9aa70df..ac85c8051b 100644
--- a/common/system_common.c
+++ b/common/system_common.c
@@ -218,12 +218,12 @@ enum system_image_copy_t system_get_image_copy(void)
 	uintptr_t my_addr = (uintptr_t)system_get_image_copy -
 			    CONFIG_FLASH_BASE;
 
-	if (my_addr >= CONFIG_SECTION_RO_OFF &&
-	    my_addr < (CONFIG_SECTION_RO_OFF + CONFIG_SECTION_RO_SIZE))
+	if (my_addr >= CONFIG_FW_RO_OFF &&
+	    my_addr < (CONFIG_FW_RO_OFF + CONFIG_FW_RO_SIZE))
 		return SYSTEM_IMAGE_RO;
 
-	if (my_addr >= CONFIG_SECTION_RW_OFF &&
-	    my_addr < (CONFIG_SECTION_RW_OFF + CONFIG_SECTION_RW_SIZE))
+	if (my_addr >= CONFIG_FW_RW_OFF &&
+	    my_addr < (CONFIG_FW_RW_OFF + CONFIG_FW_RW_SIZE))
 		return SYSTEM_IMAGE_RW;
 
 	return SYSTEM_IMAGE_UNKNOWN;
@@ -235,11 +235,11 @@ int system_get_image_used(enum system_image_copy_t copy)
 	int size = 0;
 
 	if (copy == SYSTEM_IMAGE_RO) {
-		image = (const uint8_t *)CONFIG_SECTION_RO_OFF;
-		size = CONFIG_SECTION_RO_SIZE;
+		image = (const uint8_t *)CONFIG_FW_RO_OFF;
+		size = CONFIG_FW_RO_SIZE;
 	} else if (copy == SYSTEM_IMAGE_RW) {
-		image = (const uint8_t *)CONFIG_SECTION_RW_OFF;
-		size = CONFIG_SECTION_RW_SIZE;
+		image = (const uint8_t *)CONFIG_FW_RW_OFF;
+		size = CONFIG_FW_RW_SIZE;
 	}
 
 	if (size <= 0)
diff --git a/include/flash.h b/include/flash.h
index 4bcbb8eb8f..2079032a0a 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -15,18 +15,18 @@
 #define PHYSICAL_BANKS (CONFIG_FLASH_PHYSICAL_SIZE / CONFIG_FLASH_BANK_SIZE)
 
 /* Read-only firmware offset and size in units of flash banks */
-#define RO_BANK_OFFSET (CONFIG_SECTION_RO_OFF / CONFIG_FLASH_BANK_SIZE)
-#define RO_BANK_COUNT  (CONFIG_SECTION_RO_SIZE / CONFIG_FLASH_BANK_SIZE)
+#define RO_BANK_OFFSET		(CONFIG_FW_RO_OFF / CONFIG_FLASH_BANK_SIZE)
+#define RO_BANK_COUNT		(CONFIG_FW_RO_SIZE / CONFIG_FLASH_BANK_SIZE)
 
 /* Read-write firmware offset and size in units of flash banks */
-#define RW_BANK_OFFSET (CONFIG_SECTION_RW_OFF / CONFIG_FLASH_BANK_SIZE)
-#define RW_BANK_COUNT  (CONFIG_SECTION_RW_SIZE / CONFIG_FLASH_BANK_SIZE)
+#define RW_BANK_OFFSET		(CONFIG_FW_RW_OFF / CONFIG_FLASH_BANK_SIZE)
+#define RW_BANK_COUNT		(CONFIG_FW_RW_SIZE / CONFIG_FLASH_BANK_SIZE)
 
 /* Persistent protection state flash offset / size / bank */
-#define PSTATE_OFFSET     CONFIG_SECTION_FLASH_PSTATE_OFF
-#define PSTATE_SIZE       CONFIG_SECTION_FLASH_PSTATE_SIZE
-#define PSTATE_BANK       (PSTATE_OFFSET / CONFIG_FLASH_BANK_SIZE)
-#define PSTATE_BANK_COUNT (PSTATE_SIZE / CONFIG_FLASH_BANK_SIZE)
+#define PSTATE_OFFSET		CONFIG_FW_PSTATE_OFF
+#define PSTATE_SIZE		CONFIG_FW_PSTATE_SIZE
+#define PSTATE_BANK		(PSTATE_OFFSET / CONFIG_FLASH_BANK_SIZE)
+#define PSTATE_BANK_COUNT	(PSTATE_SIZE / CONFIG_FLASH_BANK_SIZE)
 
 /*****************************************************************************/
 /* Low-level methods, for use by flash_common. */
diff --git a/test/flash.c b/test/flash.c
index 5db8a6196c..cf6ee659fd 100644
--- a/test/flash.c
+++ b/test/flash.c
@@ -292,9 +292,9 @@ static int test_write_protect(void)
 	ASSERT_WP_FLAGS(EC_FLASH_PROTECT_ALL_NOW | EC_FLASH_PROTECT_RO_AT_BOOT);
 
 	/* Check we cannot erase anything */
-	TEST_ASSERT(flash_physical_erase(CONFIG_SECTION_RO_OFF,
+	TEST_ASSERT(flash_physical_erase(CONFIG_FW_RO_OFF,
 			CONFIG_FLASH_ERASE_SIZE) != EC_SUCCESS);
-	TEST_ASSERT(flash_physical_erase(CONFIG_SECTION_RW_OFF,
+	TEST_ASSERT(flash_physical_erase(CONFIG_FW_RW_OFF,
 			CONFIG_FLASH_ERASE_SIZE) != EC_SUCCESS);
 
 	return EC_SUCCESS;
@@ -304,7 +304,7 @@ static int test_boot_write_protect(void)
 {
 	/* Check write protect state persists through reboot */
 	ASSERT_WP_FLAGS(EC_FLASH_PROTECT_RO_NOW | EC_FLASH_PROTECT_RO_AT_BOOT);
-	TEST_ASSERT(flash_physical_erase(CONFIG_SECTION_RO_OFF,
+	TEST_ASSERT(flash_physical_erase(CONFIG_FW_RO_OFF,
 			CONFIG_FLASH_ERASE_SIZE) != EC_SUCCESS);
 
 	return EC_SUCCESS;
diff --git a/util/flash_ec b/util/flash_ec
index 3e8e298168..32301315f0 100755
--- a/util/flash_ec
+++ b/util/flash_ec
@@ -152,6 +152,8 @@ function flash_daisy() {
 	fi
 
 	if [ "${FLAGS_unprotect}" = ${FLAGS_TRUE} ] ; then
+		# Unprotect exists, but isn't needed because it's implicit
+		# in writing the entire image
 		die "--unprotect not supported for this board."
 	fi
 
@@ -163,10 +165,13 @@ function flash_daisy() {
 	fi
 	dut_control ec_uart_parity:even
 	dut_control ec_uart_baudrate:115200
-	# force the EC to boot in serial monitor mode
+	# Force the EC to boot in serial monitor mode
 	ec_enable_boot0
-	# reset the EC
+	# Reset the EC
 	ec_reset
+	# TODO: add -u flag to unprotect the flash so that writes will succeed
+	# on a chip which has temporarily protected itself via the WRPx option
+	# bytes.
 	${STM32MON} -d ${EC_UART} -e -w ${IMG}
 }
 
@@ -187,6 +192,24 @@ function flash_link() {
 	die "Failed to program ${IMG}"
 }
 
+function flash_slippy() {
+	OCD_CFG="servo_v2_slower.cfg"
+	OCD_PATH="${SRC_ROOT}/platform/ec/chip/lm4/openocd"
+	OCD_CMDS="init; flash_lm4 ${IMG} ${FLAGS_offset};"
+	if [ "${FLAGS_unprotect}" = ${FLAGS_TRUE} ] ; then
+		# Unprotect exists, but isn't needed because it's implicit
+		# in writing the entire image
+		die "--unprotect not supported for this board."
+	fi
+	OCD_CMDS="${OCD_CMDS} shutdown;"
+
+	dut_control jtag_buf_on_flex_en:on
+	dut_control jtag_buf_en:on
+
+	sudo openocd -s "${OCD_PATH}" -f "${OCD_CFG}" -c "${OCD_CMDS}" || \
+	die "Failed to program ${IMG}"
+}
+
 IMG="$(ec_image)"
 info "Using EC image : ${IMG}"
 
@@ -202,7 +225,8 @@ save="$(servo_save)"
 
 case "${BOARD}" in
 	daisy | snow | spring | pit ) flash_daisy ;;
-	link | slippy | falco | peppy ) flash_link ;;
+	link ) flash_link ;;
+	slippy | falco | peppy ) flash_slippy ;;
 	*) die "board ${BOARD} not supported" ;;
 esac