diff options
| author | Jason Yuan <jasonyuan@google.com> | 2023-03-13 14:00:26 -0700 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2023-03-15 21:11:22 +0000 |
| commit | b45d40c5dae8512a61f9eaabc29706eea0b08961 (patch) | |
| tree | cb0ce8461762897e8ff98de2cb930a18115f11e0 | |
| parent | b3eb71c602bb785c0fccd677ae375336dcfa3ecf (diff) | |
| download | chrome-ec-b45d40c5dae8512a61f9eaabc29706eea0b08961.tar.gz | |
rex: fix polarity on tcpc reset line
This CL adds the ACTIVE_LOW flag to the TCPC reset line.
BUG=b:254148652
TEST=none
BRANCH=none
LOW_COVERAGE_REASON=Some untested code have been simplified, which does
not actually reduce code coverage even though it is
technically uncovered.
Change-Id: I05234c6b11aa67b641a7330c0f7798662e4f383a
Signed-off-by: Jason Yuan <jasonyuan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4335412
Tested-by: zhi cheng yuan <jasonyuan@chromium.org>
Auto-Submit: zhi cheng yuan <jasonyuan@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: zhi cheng yuan <jasonyuan@chromium.org>
| -rw-r--r-- | zephyr/program/rex/rex.dtsi | 8 | ||||
| -rw-r--r-- | zephyr/program/rex/src/usbc_config.c | 12 |
2 files changed, 14 insertions, 6 deletions
diff --git a/zephyr/program/rex/rex.dtsi b/zephyr/program/rex/rex.dtsi index 7985f5ab76..c72307693e 100644 --- a/zephyr/program/rex/rex.dtsi +++ b/zephyr/program/rex/rex.dtsi @@ -58,6 +58,14 @@ gpios = <&gpio3 4 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; enum-name = "GPIO_USB_C1_TCPC_INT_ODL"; }; + /delete-node/ usb_c0_tcpc_rst_odl; + /delete-node/ usb_c1_rt_rst_r_odl; + gpio_usb_c0_tcpc_rst_odl: usb_c0_tcpc_rst_odl { + gpios = <&gpio6 7 (GPIO_ODR_HIGH | GPIO_ACTIVE_LOW)>; + }; + gpio_usb_c1_rt_rst_r_odl: usb_c1_rt_rst_r_odl { + gpios = <&gpio7 4 (GPIO_ODR_HIGH | GPIO_ACTIVE_LOW)>; + }; }; usba-port-enable-list { diff --git a/zephyr/program/rex/src/usbc_config.c b/zephyr/program/rex/src/usbc_config.c index 1eb429f5c8..13a2fde86b 100644 --- a/zephyr/program/rex/src/usbc_config.c +++ b/zephyr/program/rex/src/usbc_config.c @@ -94,9 +94,9 @@ static void reset_nct38xx_port(int port) return; } - gpio_pin_set_dt(reset_gpio_l, 0); - msleep(NCT38XX_RESET_HOLD_DELAY_MS); gpio_pin_set_dt(reset_gpio_l, 1); + msleep(NCT38XX_RESET_HOLD_DELAY_MS); + gpio_pin_set_dt(reset_gpio_l, 0); nct38xx_reset_notify(port); if (NCT3807_RESET_POST_DELAY_MS != 0) { msleep(NCT3807_RESET_POST_DELAY_MS); @@ -113,9 +113,9 @@ void board_reset_pd_mcu(void) reset_nct38xx_port(USBC_PORT_C0); /* Reset TCPC1 */ - gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_c1_rt_rst_r_odl), 0); - msleep(PS8XXX_RESET_DELAY_MS); gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_c1_rt_rst_r_odl), 1); + msleep(PS8XXX_RESET_DELAY_MS); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_c1_rt_rst_r_odl), 0); msleep(PS8815_FW_INIT_DELAY_MS); } @@ -133,12 +133,12 @@ uint16_t tcpc_get_alert_status(void) * its reset line active. */ if (gpio_pin_get_dt(&tcpc_config[0].irq_gpio) && - gpio_pin_get_dt(tcpc_c0_rst_l)) { + !gpio_pin_get_dt(tcpc_c0_rst_l)) { status |= PD_STATUS_TCPC_ALERT_0; } if (gpio_pin_get_dt(&tcpc_config[1].irq_gpio) && - gpio_pin_get_dt(tcpc_c1_rst_l)) { + !gpio_pin_get_dt(tcpc_c1_rst_l)) { status |= PD_STATUS_TCPC_ALERT_1; } |