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authorSheng-Liang Song <ssl@chromium.org>2014-07-25 13:45:00 -0700
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2014-09-03 22:49:28 +0000
commit51e48026c206688c3387c4b4f1d1c0ed42a959e1 (patch)
treeef432da8ab77758d741e4f91d6102b7c4d1bf2f3
parent00816a1552db928f662119bf4562be19bb9274fe (diff)
downloadchrome-ec-51e48026c206688c3387c4b4f1d1c0ed42a959e1.tar.gz
EC: Add smart battery firmware update driver
Ref: Common Smart Battery System Inferface Specification v8.0. - Added 2 new AP->EC Command APIs EC_CMD_SB_FW_UPDATE, EC_CMD_ENTERING_MODE - Implemented common smart battery update drivers. BUG=chrome-os-partner:24741 CQ-DEPEND=CL:210032 CQ-DEPEND=CL:210033 CQ-DEPEND=CL:215720 BRANCH=ToT,glimmer TEST=Verified on LGC & Simplo smart battery Change-Id: Ice6e60b1b04762217ae7613356d6925777c06abf Signed-off-by: Sheng-Liang Song <ssl@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/205323 Reviewed-by: Randall Spangler <rspangler@chromium.org>
-rw-r--r--common/charge_state_v1.c7
-rw-r--r--common/charge_state_v2.c8
-rw-r--r--common/host_command.c20
-rw-r--r--driver/battery/sb_fw_update.c268
-rw-r--r--driver/battery/sb_fw_update.h114
-rw-r--r--driver/build.mk5
-rw-r--r--include/config.h3
-rw-r--r--include/ec_commands.h77
-rw-r--r--include/host_command.h10
9 files changed, 510 insertions, 2 deletions
diff --git a/common/charge_state_v1.c b/common/charge_state_v1.c
index 0bf0080de2..b4ecb74c5b 100644
--- a/common/charge_state_v1.c
+++ b/common/charge_state_v1.c
@@ -16,6 +16,7 @@
#include "hooks.h"
#include "host_command.h"
#include "printf.h"
+#include "sb_fw_update.h"
#include "system.h"
#include "task.h"
#include "timer.h"
@@ -712,6 +713,12 @@ void charger_task(void)
uint8_t batt_flags;
while (1) {
+#ifdef CONFIG_SB_FIRMWARE_UPDATE
+ if (sb_fw_update_in_progress()) {
+ task_wait_event(CHARGE_MAX_SLEEP_USEC);
+ continue;
+ }
+#endif
state_common(ctx);
#ifdef CONFIG_CHARGER_TIMEOUT_HOURS
diff --git a/common/charge_state_v2.c b/common/charge_state_v2.c
index ea196b8f28..c37e8189f1 100644
--- a/common/charge_state_v2.c
+++ b/common/charge_state_v2.c
@@ -18,6 +18,7 @@
#include "host_command.h"
#include "math_util.h"
#include "printf.h"
+#include "sb_fw_update.h"
#include "system.h"
#include "task.h"
#include "timer.h"
@@ -476,6 +477,13 @@ void charger_task(void)
while (1) {
+#ifdef CONFIG_SB_FIRMWARE_UPDATE
+ if (sb_fw_update_in_progress()) {
+ task_wait_event(CHARGE_MAX_SLEEP_USEC);
+ continue;
+ }
+#endif
+
/* Let's see what's going on... */
curr.ts = get_time();
sleep_usec = 0;
diff --git a/common/host_command.c b/common/host_command.c
index dd390150aa..de570284f6 100644
--- a/common/host_command.c
+++ b/common/host_command.c
@@ -28,6 +28,9 @@
static struct host_cmd_handler_args *pending_args;
+/* Verify Boot Mode */
+static int g_vboot_mode;
+
#ifndef CONFIG_LPC
/*
* Simulated memory map. Must be word-aligned, because some of the elements
@@ -78,6 +81,11 @@ uint8_t *host_get_memmap(int offset)
#endif
}
+int host_get_vboot_mode(void)
+{
+ return g_vboot_mode;
+}
+
test_mockable void host_send_response(struct host_cmd_handler_args *args)
{
#ifdef CONFIG_HOST_COMMAND_STATUS
@@ -606,6 +614,18 @@ DECLARE_HOST_COMMAND(EC_CMD_RESEND_RESPONSE,
EC_VER_MASK(0));
#endif /* CONFIG_HOST_COMMAND_STATUS */
+
+static int host_command_entering_mode(struct host_cmd_handler_args *args)
+{
+ struct ec_params_entering_mode *param =
+ (struct ec_params_entering_mode *)args->params;
+ args->response_size = 0;
+ g_vboot_mode = param->vboot_mode;
+ return EC_SUCCESS;
+}
+DECLARE_HOST_COMMAND(EC_CMD_ENTERING_MODE,
+ host_command_entering_mode, EC_VER_MASK(0));
+
/* Returns what we tell it to. */
static int host_command_test_protocol(struct host_cmd_handler_args *args)
{
diff --git a/driver/battery/sb_fw_update.c b/driver/battery/sb_fw_update.c
new file mode 100644
index 0000000000..48369179ef
--- /dev/null
+++ b/driver/battery/sb_fw_update.c
@@ -0,0 +1,268 @@
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * Smart battery Firmware Update driver.
+ * Ref: Common Smart Battery System Interface Specification v8.0.
+ */
+
+#include "battery.h"
+#include "battery_smart.h"
+#include "host_command.h"
+#include "i2c.h"
+#include "timer.h"
+#include "util.h"
+#include "ec_commands.h"
+#include "sb_fw_update.h"
+#include "console.h"
+#include "crc8.h"
+#include "smbus.h"
+
+#define CPRINTF(fmt, args...) cprintf(CC_I2C, fmt, ## args)
+
+static struct ec_sb_fw_update_header sb_fw_hdr;
+
+static int i2c_access_enable;
+
+static int get_state(void)
+{
+ return sb_fw_hdr.subcmd;
+}
+
+static void set_state(int subcmd)
+{
+ sb_fw_hdr.subcmd = subcmd;
+}
+
+int sb_fw_update_in_progress(void)
+{
+ return i2c_access_enable;
+}
+
+/**
+ * Check if a Smart Battery Firmware Update is protected.
+ *
+ * @return 1 if YES, 0 if NO.
+ */
+static int is_protected(void)
+{
+ int state = get_state();
+ int vboot_mode = host_get_vboot_mode();
+
+ if (vboot_mode == VBOOT_MODE_DEVELOPER)
+ return 1;
+
+ if (state == EC_SB_FW_UPDATE_PROTECT) {
+ CPRINTF("firmware update is protected.\n");
+ return 1;
+ }
+
+ return !i2c_access_enable;
+}
+
+static int prepare_update(struct host_cmd_handler_args *args)
+{
+ int rv = EC_RES_SUCCESS;
+ args->response_size = 0;
+
+ if (is_protected()) {
+ CPRINTF("smbus cmd:%x data:%04x protect error\n",
+ SB_FW_UPDATE_CMD_WRITE_WORD,
+ SB_FW_UPDATE_CMD_WRITE_WORD_PREPARE);
+ return EC_RES_INVALID_COMMAND;
+ }
+
+ set_state(EC_SB_FW_UPDATE_PREPARE);
+
+ CPRINTF("smbus cmd:%x data:%04x\n",
+ SB_FW_UPDATE_CMD_WRITE_WORD,
+ SB_FW_UPDATE_CMD_WRITE_WORD_PREPARE);
+
+ rv = smbus_write_word(I2C_PORT_BATTERY, BATTERY_ADDR,
+ SB_FW_UPDATE_CMD_WRITE_WORD,
+ SB_FW_UPDATE_CMD_WRITE_WORD_PREPARE);
+ if (rv) {
+ CPRINTF("smbus cmd:%x data:%04x access error\n",
+ SB_FW_UPDATE_CMD_WRITE_WORD,
+ SB_FW_UPDATE_CMD_WRITE_WORD_PREPARE);
+ return EC_RES_ERROR;
+ }
+
+ return EC_RES_SUCCESS;
+}
+
+static int begin_update(struct host_cmd_handler_args *args)
+{
+ int rv = EC_RES_SUCCESS;
+ args->response_size = 0;
+
+ if (is_protected()) {
+ CPRINTF("smbus cmd:%x data:%04x protect error\n",
+ SB_FW_UPDATE_CMD_WRITE_WORD,
+ SB_FW_UPDATE_CMD_WRITE_WORD_UPDATE);
+ return EC_RES_INVALID_COMMAND;
+ }
+
+ if (!i2c_access_enable)
+ return EC_RES_ERROR;
+
+ set_state(EC_SB_FW_UPDATE_BEGIN);
+
+ rv = smbus_write_word(I2C_PORT_BATTERY, BATTERY_ADDR,
+ SB_FW_UPDATE_CMD_WRITE_WORD,
+ SB_FW_UPDATE_CMD_WRITE_WORD_UPDATE);
+ if (rv) {
+ CPRINTF("smbus cmd:%x data:%04x access error\n",
+ SB_FW_UPDATE_CMD_WRITE_WORD,
+ SB_FW_UPDATE_CMD_WRITE_WORD_UPDATE);
+ return EC_RES_ERROR;
+ }
+
+ return EC_RES_SUCCESS;
+}
+
+static int end_update(struct host_cmd_handler_args *args)
+{
+ int rv = EC_RES_SUCCESS;
+ set_state(EC_SB_FW_UPDATE_END);
+
+ args->response_size = 0;
+ if (!i2c_access_enable)
+ return EC_RES_ERROR;
+
+ rv = smbus_write_word(I2C_PORT_BATTERY, BATTERY_ADDR,
+ SB_FW_UPDATE_CMD_WRITE_WORD,
+ SB_FW_UPDATE_CMD_WRITE_WORD_END);
+ if (rv) {
+ CPRINTF("smbus cmd:%x data:%x access error\n",
+ SB_FW_UPDATE_CMD_WRITE_WORD,
+ SB_FW_UPDATE_CMD_WRITE_WORD_END);
+ return EC_RES_ERROR;
+ }
+
+ return EC_RES_SUCCESS;
+}
+
+
+static int get_info(struct host_cmd_handler_args *args)
+{
+ int rv = EC_RES_SUCCESS;
+ uint8_t len = SB_FW_UPDATE_CMD_INFO_SIZE;
+
+ struct ec_response_sb_fw_update *resp =
+ (struct ec_response_sb_fw_update *)args->response;
+
+ CPRINTF("smbus cmd:%x read battery info\n",
+ SB_FW_UPDATE_CMD_READ_INFO);
+
+ args->response_size = len;
+
+ if (!i2c_access_enable) {
+ CPRINTF("smbus cmd:%x rd info - protect error\n",
+ SB_FW_UPDATE_CMD_READ_INFO);
+ return EC_RES_ERROR;
+ }
+
+ rv = smbus_read_block(I2C_PORT_BATTERY, BATTERY_ADDR,
+ SB_FW_UPDATE_CMD_READ_INFO, resp->info.data, &len);
+ if (rv) {
+ CPRINTF("smbus cmd:%x rd info - access error\n",
+ SB_FW_UPDATE_CMD_READ_INFO);
+ rv = EC_RES_ERROR;
+ }
+ return EC_RES_SUCCESS;
+}
+
+static int get_status(struct host_cmd_handler_args *args)
+{
+ int rv = EC_RES_SUCCESS;
+
+ struct ec_response_sb_fw_update *resp =
+ (struct ec_response_sb_fw_update *)args->response;
+
+ uint16_t *p16 = (uint16_t *) resp->status.data;
+
+ struct sb_fw_update_status *sts =
+ (struct sb_fw_update_status *) resp->status.data;
+
+ /* Enable smart battery i2c access */
+ i2c_access_enable = 1;
+
+ args->response_size = SB_FW_UPDATE_CMD_STATUS_SIZE;
+
+ rv = smbus_read_word(I2C_PORT_BATTERY, BATTERY_ADDR,
+ SB_FW_UPDATE_CMD_READ_STATUS, p16);
+
+ if (rv == EC_ERROR_BUSY) {
+ *p16 = 0;
+ sts->busy = 1;
+ return EC_RES_SUCCESS;
+ } else if (rv) {
+ CPRINTF("i2c cmd:%x read status error:0x%X\n",
+ SB_FW_UPDATE_CMD_READ_STATUS, rv);
+ return EC_RES_ERROR;
+ }
+ return EC_RES_SUCCESS;
+}
+
+static int set_protect(struct host_cmd_handler_args *args)
+{
+ set_state(EC_SB_FW_UPDATE_PROTECT);
+ i2c_access_enable = 0;
+ CPRINTF("firmware enter protect state !\n");
+ args->response_size = 0;
+ return EC_RES_SUCCESS;
+}
+
+static int write_block(struct host_cmd_handler_args *args)
+{
+ int rv = EC_RES_SUCCESS;
+ struct ec_params_sb_fw_update *param =
+ (struct ec_params_sb_fw_update *)args->params;
+
+ args->response_size = 0;
+
+ if (is_protected()) {
+ CPRINTF("smbus write block protect error\n");
+ return EC_RES_INVALID_COMMAND;
+ }
+
+ set_state(EC_SB_FW_UPDATE_WRITE);
+
+ rv = smbus_write_block(I2C_PORT_BATTERY, BATTERY_ADDR,
+ SB_FW_UPDATE_CMD_WRITE_BLOCK, param->write.data,
+ SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE);
+ if (rv) {
+ CPRINTF("smbus write block access error\n");
+ return EC_RES_ERROR;
+ }
+ return rv;
+}
+
+typedef int (*sb_fw_update_func)(struct host_cmd_handler_args *args);
+
+static int sb_fw_update(struct host_cmd_handler_args *args)
+{
+ struct ec_sb_fw_update_header *hdr =
+ (struct ec_sb_fw_update_header *)args->params;
+
+ sb_fw_update_func sb_fw_update_tbl[] = {
+ prepare_update,
+ get_info,
+ begin_update,
+ write_block,
+ end_update,
+ get_status,
+ set_protect
+ };
+
+ if (hdr->subcmd < EC_SB_FW_UPDATE_MAX)
+ return sb_fw_update_tbl[hdr->subcmd](args);
+ else
+ return EC_RES_INVALID_PARAM;
+}
+
+DECLARE_HOST_COMMAND(EC_CMD_SB_FW_UPDATE,
+ sb_fw_update,
+ EC_VER_MASK(0));
+
diff --git a/driver/battery/sb_fw_update.h b/driver/battery/sb_fw_update.h
new file mode 100644
index 0000000000..aaf2c88da0
--- /dev/null
+++ b/driver/battery/sb_fw_update.h
@@ -0,0 +1,114 @@
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * Smart battery Firmware Update driver.
+ * Ref: Common Smart Battery System Interface Specification v8.0.
+ *
+ * cmd.0x35, Write Word
+ * 0x1000: Prepare to Update
+ * 0x2000: End of Update
+ * 0xF000: Update Firmware
+ *
+ * cmd.0x35, Read Word
+ * Firmware Update Status
+ *
+ * cmd.0x36 Write Block
+ * Send 32 byte firmware image
+ *
+ * cmd.0x37 Read Word
+ * Get Battery Information
+ * sequence:=b1,b0,b3,b2,b5,b5,b7,b6
+ *
+ * Command Sequence for Battery FW Update
+ *
+ * 0. cmd.0x35.read
+ * 1. cmd.0x37.read
+ * 2. cmd.0x35.write.0x1000
+ * 3. cmd.0x35.read.status (optional)
+ * 4. cmd.0x35.write.0xF000
+ * 5. cmd.0x35.read.status
+ * if bit8-0, go to step 2
+ * 6. cmd.0x36.write.32byte
+ * 7. cmd.0x35.read.status
+ * if FEC.b13=1, go to step 6
+ * if fatal.b12=1, go to step 2
+ * if b11,b10,b9,b2,b1,b0; go to step 1
+ * if b5,b3; go to step 8
+ * (repeat 6,7)
+ * 8. cmd.0x36.write.0x2000
+ * 9. cmd.0x35.read.status
+ */
+
+#ifndef __EC_SB_FW_UPDATE__
+#define __EC_SB_FW_UPDATE__
+
+#define SB_FW_UPDATE_CMD_WRITE_WORD 0x35
+#define SB_FW_UPDATE_CMD_WRITE_WORD_PREPARE 0x1000
+#define SB_FW_UPDATE_CMD_WRITE_WORD_END 0x2000
+#define SB_FW_UPDATE_CMD_WRITE_WORD_UPDATE 0xF000
+
+#define SB_FW_UPDATE_CMD_READ_STATUS 0x35 /* len:0+data:2+pec:1 */
+
+#define SB_FW_UPDATE_CMD_WRITE_BLOCK 0x36 /* len:1+data:32+pec:1 */
+
+#define SB_FW_UPDATE_CMD_READ_INFO 0x37 /* len:1+data:8+pec:1 */
+
+/**
+ * sb.fw.update.cmd.0x35, Read Word
+ * Firmware Update Status
+ */
+struct sb_fw_update_status {
+ uint16_t v_fail_maker_id:1; /* b0 */
+ uint16_t v_fail_hw_id:1; /* b1 */
+ uint16_t v_fail_fw_version:1; /* b2 */
+ uint16_t v_fail_permanent:1; /* b3 */
+
+ uint16_t rsvd5:1; /* b4 */
+ uint16_t permanent_failure:1; /* b5 */
+ uint16_t abnormal_condition:1; /* b6 */
+ uint16_t fw_update_supported:1; /* b7 */
+
+ uint16_t fw_update_mode:1; /* b8 */
+ uint16_t fw_corrupted:1; /* b9 */
+ uint16_t cmd_reject:1; /* b10 */
+ uint16_t invalid_data:1; /* b11 */
+
+ uint16_t fw_fatal_error:1; /* b12 */
+ uint16_t fec_error:1; /* b13 */
+ uint16_t busy:1; /* b14 */
+ uint16_t rsvd15:1; /* b15 */
+} __packed;
+
+/**
+ * sb.fw.update.cmd.0x37 Read Word
+ * Get Battery Information
+ * sequence:=b1,b0,b3,b2,b5,b5,b7,b6
+ */
+struct sb_fw_update_info {
+ uint16_t maker_id; /* b0, b1 */
+ uint16_t hardware_id; /* b2, b3 */
+ uint16_t fw_version; /* b4, b5 */
+ uint16_t data_version;/* b6, b7 */
+} __packed;
+
+/**
+ * smart.battery.maker.id
+ */
+enum sb_maker_id {
+ sb_maker_id_lgc = 0x0001, /* b0=0; b1=1 */
+ sb_maker_id_panasonic = 0x0002,
+ sb_maker_id_sanyo = 0x0003,
+ sb_maker_id_sony = 0x0004,
+ sb_maker_id_simplo = 0x0005,
+ sb_maker_id_celxpert = 0x0006,
+};
+
+/**
+ * Check if a Smart Battery Firmware Update is inprogress.
+ *
+ * @return 1 if YES, 0 if NO.
+ */
+int sb_fw_update_in_progress(void);
+
+#endif
diff --git a/driver/build.mk b/driver/build.mk
index a18deb2657..1d1cd83f05 100644
--- a/driver/build.mk
+++ b/driver/build.mk
@@ -1,5 +1,5 @@
# -*- makefile -*-
-# Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
+# Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.
#
@@ -47,3 +47,6 @@ driver-$(CONFIG_TEMP_SENSOR_TMP432)+=temp_sensor/tmp432.o
# USB switches
driver-$(CONFIG_USB_SWITCH_PI3USB9281)+=usb_switch_pi3usb9281.o
driver-$(CONFIG_USB_SWITCH_TSU6721)+=usb_switch_tsu6721.o
+
+# Firmware Update
+driver-$(CONFIG_SB_FIRMWARE_UPDATE)+=battery/sb_fw_update.o
diff --git a/include/config.h b/include/config.h
index 4ea2f55dd1..961c8eeb9a 100644
--- a/include/config.h
+++ b/include/config.h
@@ -803,6 +803,9 @@
*/
#undef CONFIG_SAVE_VBOOT_HASH
+/* Enable smart battery firmware update driver */
+#undef CONFIG_SB_FIRMWARE_UPDATE
+
/* Allow the board to use a GPIO for the SCI# signal. */
#undef CONFIG_SCI_GPIO
diff --git a/include/ec_commands.h b/include/ec_commands.h
index 6b065accdc..64b70909b4 100644
--- a/include/ec_commands.h
+++ b/include/ec_commands.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -2290,6 +2290,81 @@ struct ec_response_battery_vendor_param {
} __packed;
/*****************************************************************************/
+/*
+ * Smart Battery Firmware Update Commands
+ */
+#define EC_CMD_SB_FW_UPDATE 0xb5
+
+enum ec_sb_fw_update_subcmd {
+ EC_SB_FW_UPDATE_PREPARE = 0x0,
+ EC_SB_FW_UPDATE_INFO = 0x1, /*query sb info */
+ EC_SB_FW_UPDATE_BEGIN = 0x2, /*check if protected */
+ EC_SB_FW_UPDATE_WRITE = 0x3, /*check if protected */
+ EC_SB_FW_UPDATE_END = 0x4,
+ EC_SB_FW_UPDATE_STATUS = 0x5,
+ EC_SB_FW_UPDATE_PROTECT = 0x6,
+ EC_SB_FW_UPDATE_MAX = 0x7,
+};
+
+#define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32
+#define SB_FW_UPDATE_CMD_STATUS_SIZE 2
+#define SB_FW_UPDATE_CMD_INFO_SIZE 8
+
+struct ec_sb_fw_update_header {
+ uint16_t subcmd; /* enum ec_sb_fw_update_subcmd */
+ uint16_t fw_id; /* firmware id */
+} __packed;
+
+struct ec_params_sb_fw_update {
+ struct ec_sb_fw_update_header hdr;
+ union {
+ /* EC_SB_FW_UPDATE_PREPARE = 0x0 */
+ /* EC_SB_FW_UPDATE_INFO = 0x1 */
+ /* EC_SB_FW_UPDATE_BEGIN = 0x2 */
+ /* EC_SB_FW_UPDATE_END = 0x4 */
+ /* EC_SB_FW_UPDATE_STATUS = 0x5 */
+ /* EC_SB_FW_UPDATE_PROTECT = 0x6 */
+ struct {
+ /* no args */
+ } dummy;
+
+ /* EC_SB_FW_UPDATE_WRITE = 0x3 */
+ struct {
+ uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE];
+ } write;
+ };
+} __packed;
+
+struct ec_response_sb_fw_update {
+ union {
+ /* EC_SB_FW_UPDATE_INFO = 0x1 */
+ struct {
+ uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE];
+ } info;
+
+ /* EC_SB_FW_UPDATE_STATUS = 0x5 */
+ struct {
+ uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE];
+ } status;
+ };
+} __packed;
+
+/*
+ * Entering Verified Boot Mode Command
+ * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command.
+ * Valid Modes are: normal, developer, and recovery.
+ */
+#define EC_CMD_ENTERING_MODE 0xb6
+
+struct ec_params_entering_mode {
+ int vboot_mode;
+} __packed;
+
+#define VBOOT_MODE_NORMAL 0
+#define VBOOT_MODE_DEVELOPER 1
+#define VBOOT_MODE_RECOVERY 2
+
+/*****************************************************************************/
/* System commands */
/*
diff --git a/include/host_command.h b/include/host_command.h
index 231ef9a6b8..a25f06d10a 100644
--- a/include/host_command.h
+++ b/include/host_command.h
@@ -227,4 +227,14 @@ int pd_host_command(int command, int version,
const void *outdata, int outsize,
void *indata, int insize);
+
+/**
+ * EC: Get verify boot mode
+ * @return vboot_mode as the following:
+ * VBOOT_MODE_NORMAL - normal mode
+ * VBOOT_MODE_DEVELOPER - developer mode
+ * VBOOT_MODE_RECOVERY - recovery mode
+ */
+int host_get_vboot_mode(void);
+
#endif /* __CROS_EC_HOST_COMMAND_H */