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| author | Alec Berg <alecaberg@chromium.org> | 2014-09-05 02:41:28 -0700 |
|---|---|---|
| committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2014-09-08 23:08:06 +0000 |
| commit | bd498b593fc9edf7c5ffb73bd79d5bbaa3b89ae0 (patch) | |
| tree | afca9f42056351f3a277dc6fae91ef7dada412b9 | |
| parent | 10042d9c5c3a32f3707e689a2bbc3270f38ee5b8 (diff) | |
| download | chrome-ec-bd498b593fc9edf7c5ffb73bd79d5bbaa3b89ae0.tar.gz | |
samus_pd: fix switching spi bus for type-C port 0 and 1
We switched which spi bus we were using for each type-C port EVT,
but missed one place where the busses should have been switched.
Note, this bug wasn't actually causing any problems because
we enable both spi busses at init time and they remain enabled.
BUG=none
BRANCH=none
TEST=load on EVT samus, make sure PD negotiation works on both
ports
Change-Id: I7b4fbee01b58be41521745d7bef6d9357e50be57
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/216606
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
| -rw-r--r-- | board/samus_pd/usb_pd_config.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/board/samus_pd/usb_pd_config.h b/board/samus_pd/usb_pd_config.h index ce260a1e0d..0d0372d51a 100644 --- a/board/samus_pd/usb_pd_config.h +++ b/board/samus_pd/usb_pd_config.h @@ -47,9 +47,9 @@ static inline void spi_enable_clock(int port) { if (port == 0) - STM32_RCC_APB2ENR |= STM32_RCC_PB2_SPI1; - else STM32_RCC_APB1ENR |= STM32_RCC_PB1_SPI2; + else + STM32_RCC_APB2ENR |= STM32_RCC_PB2_SPI1; } /* DMA for transmit uses DMA CH7 for C0 and DMA_CH3 for C1 */ |