shuboz: Initial EC image

Create the initial EC image for the shuboz variant by copying the
dalboz reference board EC files into a new directory named for
the variant.

(Auto-Generated by create_initial_ec_image.sh version 1.2.0).

BUG=b:172021093
BRANCH=none
TEST=make BOARD=shuboz

Signed-off-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com>
Change-Id: I636a0e5c9b72cc67e7d751d9233a2fb8b2f60691
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2507360
Reviewed-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
(cherry picked from commit aa71c2bfd0a6207a3ae2b52782abb2655088c9c8)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2566858
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-by: Kane Chen <kane_chen@pegatron.corp-partner.google.com>
Tested-by: Kane Chen <kane_chen@pegatron.corp-partner.google.com>
Commit-Queue: Isaac Lee <isaaclee@google.com>

8 files changed, 1292 insertions, 0 deletions

diff --git a/board/shuboz/analyzestack.yaml b/board/shuboz/analyzestack.yaml
new file mode 100644
index 0000000000..7ff5f39644
--- /dev/null
+++ b/board/shuboz/analyzestack.yaml
@@ -0,0 +1,2 @@
+remove:
+- panic_assert_fail
diff --git a/board/shuboz/battery.c b/board/shuboz/battery.c
new file mode 100644
index 0000000000..b5cccdd9cf
--- /dev/null
+++ b/board/shuboz/battery.c
@@ -0,0 +1,124 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * Battery pack vendor provided charging profile
+ */
+
+#include "battery_fuel_gauge.h"
+#include "common.h"
+#include "util.h"
+
+/*
+ * Battery info for all Zork battery types. Note that the fields
+ * start_charging_min/max and charging_min/max are not used for the charger.
+ * The effective temperature limits are given by discharging_min/max_c.
+ *
+ * Fuel Gauge (FG) parameters which are used for determining if the battery
+ * is connected, the appropriate ship mode (battery cutoff) command, and the
+ * charge/discharge FETs status.
+ *
+ * Ship mode (battery cutoff) requires 2 writes to the appropriate smart battery
+ * register. For some batteries, the charge/discharge FET bits are set when
+ * charging/discharging is active, in other types, these bits set mean that
+ * charging/discharging is disabled. Therefore, in addition to the mask for
+ * these bits, a disconnect value must be specified. Note that for TI fuel
+ * gauge, the charge/discharge FET status is found in Operation Status (0x54),
+ * but a read of Manufacturer Access (0x00) will return the lower 16 bits of
+ * Operation status which contains the FET status bits.
+ *
+ * The assumption for battery types supported is that the charge/discharge FET
+ * status can be read with a sb_read() command and therefore, only the register
+ * address, mask, and disconnect value need to be provided.
+ */
+const struct board_batt_params board_battery_info[] = {
+	/* SMP L19M3PG1 */
+	[BATTERY_SMP] = {
+		.fuel_gauge = {
+			.manuf_name = "SMP",
+			.device_name = "L19M3PG1",
+			.ship_mode = {
+				.reg_addr = 0x34,
+				.reg_data = { 0x0000, 0x1000 },
+			},
+			.fet = {
+				.reg_addr = 0x34,
+				.reg_mask = 0x0100,
+				.disconnect_val = 0x0100,
+			}
+		},
+		.batt_info = {
+			.voltage_max		= 13200, /* mV */
+			.voltage_normal		= 11520, /* mV */
+			.voltage_min		= 9000,  /* mV */
+			.precharge_current	= 200,	 /* mA */
+			.start_charging_min_c	= 0,
+			.start_charging_max_c	= 60,
+			.charging_min_c		= 0,
+			.charging_max_c		= 50,
+			.discharging_min_c	= -20,
+			.discharging_max_c	= 73,
+		},
+	},
+
+	/* LGC  L19L3PG1 */
+	[BATTERY_LGC] = {
+		.fuel_gauge = {
+			.manuf_name = "LGC",
+			.device_name = "L19L3PG1",
+			.ship_mode = {
+				.reg_addr = 0x34,
+				.reg_data = { 0x0000, 0x1000 },
+			},
+			.fet = {
+				.reg_addr = 0x34,
+				.reg_mask = 0x0100,
+				.disconnect_val = 0x0100,
+			}
+		},
+		.batt_info = {
+			.voltage_max		= 13200, /* mV */
+			.voltage_normal		= 11550, /* mV */
+			.voltage_min		= 9000,  /* mV */
+			.precharge_current	= 200,	 /* mA */
+			.start_charging_min_c	= 0,
+			.start_charging_max_c	= 60,
+			.charging_min_c		= 0,
+			.charging_max_c		= 50,
+			.discharging_min_c	= -20,
+			.discharging_max_c	= 73,
+		},
+	},
+
+	/* Celxpert  L19C3PG1 */
+	[BATTERY_CEL] = {
+		.fuel_gauge = {
+			.manuf_name = "Celxpert",
+			.device_name = "L19C3PG1",
+			.ship_mode = {
+				.reg_addr = 0x34,
+				.reg_data = { 0x0000, 0x1000 },
+			},
+			.fet = {
+				.reg_addr = 0x34,
+				.reg_mask = 0x0100,
+				.disconnect_val = 0x0100,
+			}
+		},
+		.batt_info = {
+			.voltage_max		= 13200, /* mV */
+			.voltage_normal		= 11520, /* mV */
+			.voltage_min		= 9000,  /* mV */
+			.precharge_current	= 200,	 /* mA */
+			.start_charging_min_c	= 0,
+			.start_charging_max_c	= 60,
+			.charging_min_c		= 0,
+			.charging_max_c		= 50,
+			.discharging_min_c	= -20,
+			.discharging_max_c	= 70,
+		},
+	},
+};
+BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT);
+
+const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_SMP;
diff --git a/board/shuboz/board.c b/board/shuboz/board.c
new file mode 100644
index 0000000000..61560c4dd4
--- /dev/null
+++ b/board/shuboz/board.c
@@ -0,0 +1,666 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include "battery_smart.h"
+#include "button.h"
+#include "cros_board_info.h"
+#include "driver/accel_lis2dw12.h"
+#include "driver/accelgyro_lsm6dsm.h"
+#include "driver/bc12/pi3usb9201.h"
+#include "driver/ioexpander/pcal6408.h"
+#include "driver/ppc/aoz1380.h"
+#include "driver/ppc/nx20p348x.h"
+#include "driver/retimer/pi3hdx1204.h"
+#include "driver/tcpm/nct38xx.h"
+#include "driver/usb_mux/amd_fp5.h"
+#include "driver/usb_mux/ps8740.h"
+#include "driver/usb_mux/ps8743.h"
+#include "extpower.h"
+#include "fan.h"
+#include "fan_chip.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "ioexpander.h"
+#include "lid_switch.h"
+#include "power.h"
+#include "power_button.h"
+#include "pwm.h"
+#include "pwm_chip.h"
+#include "switch.h"
+#include "system.h"
+#include "tablet_mode.h"
+#include "task.h"
+#include "usb_charge.h"
+#include "usb_pd_tcpm.h"
+#include "usbc_ppc.h"
+
+#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ## args)
+#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ## args)
+
+/* This I2C moved. Temporarily detect and support the V0 HW. */
+int I2C_PORT_BATTERY = I2C_PORT_BATTERY_V1;
+
+/* Interrupt handler varies with DB option. */
+void (*c1_tcpc_config_interrupt)(enum gpio_signal signal) = tcpc_alert_event;
+
+void c1_tcpc_interrupt(enum gpio_signal signal)
+{
+	c1_tcpc_config_interrupt(signal);
+}
+
+/* Interrupt for C1 PPC with USB-C DB, HPD with HDMI DB. */
+void (*c1_ppc_config_interrupt)(enum gpio_signal signal) = ppc_interrupt;
+
+void c1_ppc_interrupt(enum gpio_signal signal)
+{
+	c1_ppc_config_interrupt(signal);
+}
+
+static void hdmi_hpd_handler(void)
+{
+	/* Pass HPD through from DB OPT1 HDMI connector to AP's DP1. */
+	int hpd = gpio_get_level(GPIO_USB_C1_PPC_INT_ODL);
+
+	gpio_set_level(GPIO_DP1_HPD, hpd);
+	ccprints("HDMI HPD %d", hpd);
+}
+DECLARE_DEFERRED(hdmi_hpd_handler);
+
+void hdmi_hpd_interrupt(enum gpio_signal signal)
+{
+	/* Debounce for 2 msec. */
+	hook_call_deferred(&hdmi_hpd_handler_data, (2 * MSEC));
+}
+
+#include "gpio_list.h"
+
+#ifdef HAS_TASK_MOTIONSENSE
+
+/* Motion sensors */
+static struct mutex g_lid_mutex;
+static struct mutex g_base_mutex;
+
+/* sensor private data */
+static struct stprivate_data g_lis2dwl_data;
+static struct lsm6dsm_data g_lsm6dsm_data = LSM6DSM_DATA;
+
+/* Matrix to rotate accelrator into standard reference frame */
+static const mat33_fp_t base_standard_ref = {
+	{ FLOAT_TO_FP(-1), 0, 0},
+	{ 0, FLOAT_TO_FP(-1), 0},
+	{ 0, 0, FLOAT_TO_FP(1)}
+};
+
+/* TODO(gcc >= 5.0) Remove the casts to const pointer at rot_standard_ref */
+struct motion_sensor_t motion_sensors[] = {
+	[LID_ACCEL] = {
+	 .name = "Lid Accel",
+	 .active_mask = SENSOR_ACTIVE_S0_S3,
+	 .chip = MOTIONSENSE_CHIP_LIS2DWL,
+	 .type = MOTIONSENSE_TYPE_ACCEL,
+	 .location = MOTIONSENSE_LOC_LID,
+	 .drv = &lis2dw12_drv,
+	 .mutex = &g_lid_mutex,
+	 .drv_data = &g_lis2dwl_data,
+	 .port = I2C_PORT_SENSOR,
+	 .i2c_spi_addr_flags = LIS2DWL_ADDR1_FLAGS,
+	 .rot_standard_ref = NULL,
+	 .default_range = 2, /* g, enough for laptop. */
+	 .min_frequency = LIS2DW12_ODR_MIN_VAL,
+	 .max_frequency = LIS2DW12_ODR_MAX_VAL,
+	 .config = {
+		 /* EC use accel for angle detection */
+		[SENSOR_CONFIG_EC_S0] = {
+			.odr = 12500 | ROUND_UP_FLAG,
+		},
+		 /* Sensor on for lid angle detection */
+		[SENSOR_CONFIG_EC_S3] = {
+			.odr = 10000 | ROUND_UP_FLAG,
+		},
+	},
+	},
+
+	[BASE_ACCEL] = {
+	 .name = "Base Accel",
+	 .active_mask = SENSOR_ACTIVE_S0_S3,
+	 .chip = MOTIONSENSE_CHIP_LSM6DSM,
+	 .type = MOTIONSENSE_TYPE_ACCEL,
+	 .location = MOTIONSENSE_LOC_BASE,
+	 .drv = &lsm6dsm_drv,
+	 .mutex = &g_base_mutex,
+	 .drv_data = LSM6DSM_ST_DATA(g_lsm6dsm_data,
+			MOTIONSENSE_TYPE_ACCEL),
+	 .int_signal = GPIO_6AXIS_INT_L,
+	 .flags = MOTIONSENSE_FLAG_INT_SIGNAL,
+	 .port = I2C_PORT_SENSOR,
+	 .i2c_spi_addr_flags = LSM6DSM_ADDR0_FLAGS,
+	 .default_range = 4, /* g, enough for laptop */
+	 .rot_standard_ref = &base_standard_ref,
+	 .min_frequency = LSM6DSM_ODR_MIN_VAL,
+	 .max_frequency = LSM6DSM_ODR_MAX_VAL,
+	 .config = {
+		 /* EC use accel for angle detection */
+		[SENSOR_CONFIG_EC_S0] = {
+			.odr = 13000 | ROUND_UP_FLAG,
+			.ec_rate = 100 * MSEC,
+		},
+		/* Sensor on for angle detection */
+		[SENSOR_CONFIG_EC_S3] = {
+			.odr = 10000 | ROUND_UP_FLAG,
+			.ec_rate = 100 * MSEC,
+		},
+	 },
+	},
+
+	[BASE_GYRO] = {
+	 .name = "Base Gyro",
+	 .active_mask = SENSOR_ACTIVE_S0_S3,
+	 .chip = MOTIONSENSE_CHIP_LSM6DSM,
+	 .type = MOTIONSENSE_TYPE_GYRO,
+	 .location = MOTIONSENSE_LOC_BASE,
+	 .drv = &lsm6dsm_drv,
+	 .mutex = &g_base_mutex,
+	 .drv_data = LSM6DSM_ST_DATA(g_lsm6dsm_data,
+			MOTIONSENSE_TYPE_GYRO),
+	.int_signal = GPIO_6AXIS_INT_L,
+	.flags = MOTIONSENSE_FLAG_INT_SIGNAL,
+	 .port = I2C_PORT_SENSOR,
+	 .i2c_spi_addr_flags = LSM6DSM_ADDR0_FLAGS,
+	 .default_range = 1000 | ROUND_UP_FLAG, /* dps */
+	 .rot_standard_ref = &base_standard_ref,
+	 .min_frequency = LSM6DSM_ODR_MIN_VAL,
+	 .max_frequency = LSM6DSM_ODR_MAX_VAL,
+	},
+};
+
+unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors);
+
+#endif /* HAS_TASK_MOTIONSENSE */
+
+/* These IO expander GPIOs vary with DB option. */
+enum gpio_signal IOEX_USB_A1_RETIMER_EN = IOEX_USB_A1_RETIMER_EN_OPT1;
+enum gpio_signal IOEX_USB_A1_CHARGE_EN_DB_L = IOEX_USB_A1_CHARGE_EN_DB_L_OPT1;
+
+static void pcal6408_handler(void)
+{
+	pcal6408_ioex_event_handler(IOEX_HDMI_PCAL6408);
+}
+DECLARE_DEFERRED(pcal6408_handler);
+
+void pcal6408_interrupt(enum gpio_signal signal)
+{
+	hook_call_deferred(&pcal6408_handler_data, 0);
+}
+
+const struct pi3hdx1204_tuning pi3hdx1204_tuning = {
+	.eq_ch0_ch1_offset = PI3HDX1204_EQ_DB710,
+	.eq_ch2_ch3_offset = PI3HDX1204_EQ_DB710,
+	.vod_offset = PI3HDX1204_VOD_115_ALL_CHANNELS,
+	.de_offset = PI3HDX1204_DE_DB_MINUS5,
+};
+
+/*****************************************************************************
+ * Board suspend / resume
+ */
+
+static void board_chipset_resume(void)
+{
+	ioex_set_level(IOEX_USB_A1_RETIMER_EN, 1);
+
+	if (ec_config_has_hdmi_retimer_pi3hdx1204()) {
+		ioex_set_level(IOEX_EN_PWR_HDMI_DB, 1);
+		msleep(PI3HDX1204_POWER_ON_DELAY_MS);
+		pi3hdx1204_enable(I2C_PORT_TCPC1,
+				  PI3HDX1204_I2C_ADDR_FLAGS,
+				  1);
+	}
+}
+DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT);
+
+static void board_chipset_suspend(void)
+{
+	ioex_set_level(IOEX_USB_A1_RETIMER_EN, 0);
+
+	if (ec_config_has_hdmi_retimer_pi3hdx1204()) {
+		pi3hdx1204_enable(I2C_PORT_TCPC1,
+				  PI3HDX1204_I2C_ADDR_FLAGS,
+				  0);
+		ioex_set_level(IOEX_EN_PWR_HDMI_DB, 0);
+	}
+}
+DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT);
+
+static int board_ps8743_mux_set(const struct usb_mux *me,
+				mux_state_t mux_state)
+{
+	if (mux_state & USB_PD_MUX_DP_ENABLED)
+		/* Enable IN_HPD on the DB */
+		ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 1);
+	else
+		/* Disable IN_HPD on the DB */
+		ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 0);
+
+	return EC_SUCCESS;
+}
+
+
+/*****************************************************************************
+ * USB-C
+ */
+
+/*
+ * USB C0 port SBU mux use standalone FSUSB42UMX
+ * chip and it need a board specific driver.
+ * Overall, it will use chained mux framework.
+ */
+static int fsusb42umx_set_mux(const struct usb_mux *me, mux_state_t mux_state)
+{
+	if (mux_state & USB_PD_MUX_POLARITY_INVERTED)
+		ioex_set_level(IOEX_USB_C0_SBU_FLIP, 1);
+	else
+		ioex_set_level(IOEX_USB_C0_SBU_FLIP, 0);
+
+	return EC_SUCCESS;
+}
+
+/*
+ * .init is not necessary here because it has nothing
+ * to do. Primary mux will handle mux state so .get is
+ * not needed as well. usb_mux.c can handle the situation
+ * properly.
+ */
+const struct usb_mux_driver usbc0_sbu_mux_driver = {
+	.set = fsusb42umx_set_mux,
+};
+
+/*
+ * Since FSUSB42UMX is not a i2c device, .i2c_port and
+ * .i2c_addr_flags are not required here.
+ */
+const struct usb_mux usbc0_sbu_mux = {
+	.usb_port = USBC_PORT_C0,
+	.driver = &usbc0_sbu_mux_driver,
+};
+
+struct usb_mux usbc1_amd_fp5_usb_mux = {
+	.usb_port = USBC_PORT_C1,
+	.i2c_port = I2C_PORT_USB_AP_MUX,
+	.i2c_addr_flags = AMD_FP5_MUX_I2C_ADDR_FLAGS,
+	.driver = &amd_fp5_usb_mux_driver,
+	.flags = USB_MUX_FLAG_SET_WITHOUT_FLIP,
+};
+
+struct usb_mux usb_muxes[] = {
+	[USBC_PORT_C0] = {
+		.usb_port = USBC_PORT_C0,
+		.i2c_port = I2C_PORT_USB_AP_MUX,
+		.i2c_addr_flags = AMD_FP5_MUX_I2C_ADDR_FLAGS,
+		.driver = &amd_fp5_usb_mux_driver,
+		.next_mux = &usbc0_sbu_mux,
+	},
+	[USBC_PORT_C1] = {
+		.usb_port = USBC_PORT_C1,
+		.i2c_port = I2C_PORT_TCPC1,
+		.i2c_addr_flags = PS8743_I2C_ADDR1_FLAG,
+		.driver = &ps8743_usb_mux_driver,
+		.next_mux = &usbc1_amd_fp5_usb_mux,
+	}
+};
+BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT);
+
+struct ppc_config_t ppc_chips[] = {
+	[USBC_PORT_C0] = {
+		/* Device does not talk I2C */
+		.drv = &aoz1380_drv
+	},
+
+	[USBC_PORT_C1] = {
+		.i2c_port = I2C_PORT_TCPC1,
+		.i2c_addr_flags = NX20P3483_ADDR1_FLAGS,
+		.drv = &nx20p348x_drv
+	},
+};
+BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == USBC_PORT_COUNT);
+unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);
+
+void ppc_interrupt(enum gpio_signal signal)
+{
+	switch (signal) {
+	case GPIO_USB_C0_PPC_FAULT_ODL:
+		aoz1380_interrupt(USBC_PORT_C0);
+		break;
+
+	case GPIO_USB_C1_PPC_INT_ODL:
+		/*
+		 * Sensitive only to falling edges; GPIO is configured for both
+		 * because this input may be used for HDMI HPD instead.
+		 */
+		if (!gpio_get_level(signal))
+			nx20p348x_interrupt(USBC_PORT_C1);
+		break;
+
+	default:
+		break;
+	}
+}
+
+int board_set_active_charge_port(int port)
+{
+	int is_valid_port = (port >= 0 &&
+			     port < CONFIG_USB_PD_PORT_MAX_COUNT);
+	int i;
+
+	if (port == CHARGE_PORT_NONE) {
+		CPRINTSUSB("Disabling all charger ports");
+
+		/* Disable all ports. */
+		for (i = 0; i < ppc_cnt; i++) {
+			/*
+			 * Do not return early if one fails otherwise we can
+			 * get into a boot loop assertion failure.
+			 */
+			if (ppc_vbus_sink_enable(i, 0))
+				CPRINTSUSB("Disabling C%d as sink failed.", i);
+		}
+
+		return EC_SUCCESS;
+	} else if (!is_valid_port) {
+		return EC_ERROR_INVAL;
+	}
+
+
+	/* Check if the port is sourcing VBUS. */
+	if (ppc_is_sourcing_vbus(port)) {
+		CPRINTFUSB("Skip enable C%d", port);
+		return EC_ERROR_INVAL;
+	}
+
+	CPRINTSUSB("New charge port: C%d", port);
+
+	/*
+	 * Turn off the other ports' sink path FETs, before enabling the
+	 * requested charge port.
+	 */
+	for (i = 0; i < ppc_cnt; i++) {
+		if (i == port)
+			continue;
+
+		if (ppc_vbus_sink_enable(i, 0))
+			CPRINTSUSB("C%d: sink path disable failed.", i);
+	}
+
+	/* Enable requested charge port. */
+	if (ppc_vbus_sink_enable(port, 1)) {
+		CPRINTSUSB("C%d: sink path enable failed.", port);
+		return EC_ERROR_UNKNOWN;
+	}
+
+	return EC_SUCCESS;
+}
+
+void board_overcurrent_event(int port, int is_overcurrented)
+{
+	switch (port) {
+	case USBC_PORT_C0:
+		ioex_set_level(IOEX_USB_C0_FAULT_ODL, !is_overcurrented);
+		break;
+
+	case USBC_PORT_C1:
+		ioex_set_level(IOEX_USB_C1_FAULT_ODL, !is_overcurrented);
+		break;
+
+	default:
+		break;
+	}
+}
+
+const struct tcpc_config_t tcpc_config[] = {
+	[USBC_PORT_C0] = {
+		.bus_type = EC_BUS_TYPE_I2C,
+		.i2c_info = {
+			.port = I2C_PORT_TCPC0,
+			.addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS,
+		},
+		.drv = &nct38xx_tcpm_drv,
+		.flags = TCPC_FLAGS_TCPCI_REV2_0,
+	},
+	[USBC_PORT_C1] = {
+		.bus_type = EC_BUS_TYPE_I2C,
+		.i2c_info = {
+			.port = I2C_PORT_TCPC1,
+			.addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS,
+		},
+		.drv = &nct38xx_tcpm_drv,
+		.flags = TCPC_FLAGS_TCPCI_REV2_0,
+	},
+};
+BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == USBC_PORT_COUNT);
+BUILD_ASSERT(CONFIG_USB_PD_PORT_MAX_COUNT == USBC_PORT_COUNT);
+
+const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = {
+	[USBC_PORT_C0] = {
+		.i2c_port = I2C_PORT_TCPC0,
+		.i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS,
+	},
+
+	[USBC_PORT_C1] = {
+		.i2c_port = I2C_PORT_TCPC1,
+		.i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS,
+	},
+};
+BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT);
+
+static void reset_pd_port(int port, enum gpio_signal reset_gpio_l,
+			  int hold_delay, int finish_delay)
+{
+	gpio_set_level(reset_gpio_l, 0);
+	msleep(hold_delay);
+	gpio_set_level(reset_gpio_l, 1);
+	if (finish_delay)
+		msleep(finish_delay);
+}
+
+void board_reset_pd_mcu(void)
+{
+	/* Reset TCPC0 */
+	reset_pd_port(USBC_PORT_C0, GPIO_USB_C0_TCPC_RST_L,
+		      NCT38XX_RESET_HOLD_DELAY_MS,
+		      NCT38XX_RESET_POST_DELAY_MS);
+
+	/* Reset TCPC1 */
+	reset_pd_port(USBC_PORT_C1, GPIO_USB_C1_TCPC_RST_L,
+		      NCT38XX_RESET_HOLD_DELAY_MS,
+		      NCT38XX_RESET_POST_DELAY_MS);
+}
+
+uint16_t tcpc_get_alert_status(void)
+{
+	uint16_t status = 0;
+
+	/*
+	 * Check which port has the ALERT line set and ignore if that TCPC has
+	 * its reset line active.
+	 */
+	if (!gpio_get_level(GPIO_USB_C0_TCPC_INT_ODL)) {
+		if (gpio_get_level(GPIO_USB_C0_TCPC_RST_L) != 0)
+			status |= PD_STATUS_TCPC_ALERT_0;
+	}
+
+	if (!gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL)) {
+		if (gpio_get_level(GPIO_USB_C1_TCPC_RST_L) != 0)
+			status |= PD_STATUS_TCPC_ALERT_1;
+	}
+
+	return status;
+}
+
+void tcpc_alert_event(enum gpio_signal signal)
+{
+	int port = -1;
+
+	switch (signal) {
+	case GPIO_USB_C0_TCPC_INT_ODL:
+		port = 0;
+		break;
+	case GPIO_USB_C1_TCPC_INT_ODL:
+		port = 1;
+		break;
+	default:
+		return;
+	}
+
+	schedule_deferred_pd_interrupt(port);
+}
+
+void bc12_interrupt(enum gpio_signal signal)
+{
+	switch (signal) {
+	case GPIO_USB_C0_BC12_INT_ODL:
+		task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12, 0);
+		break;
+
+	case GPIO_USB_C1_BC12_INT_ODL:
+		task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12, 0);
+		break;
+
+	default:
+		break;
+	}
+}
+
+int board_pd_set_frs_enable(int port, int enable)
+{
+	int rv = EC_SUCCESS;
+
+	/* Use the TCPC to enable fast switch when FRS included */
+	if (port == USBC_PORT_C0) {
+		rv = ioex_set_level(IOEX_USB_C0_TCPC_FASTSW_CTL_EN,
+				    !!enable);
+	} else {
+		rv = ioex_set_level(IOEX_USB_C1_TCPC_FASTSW_CTL_EN,
+				    !!enable);
+	}
+
+	return rv;
+}
+
+static void setup_fw_config(void)
+{
+	uint32_t board_version = 0;
+
+	if (cbi_get_board_version(&board_version) == EC_SUCCESS
+	    && board_version >= 2) {
+		ccprints("PS8743 USB MUX");
+		usb_muxes[USBC_PORT_C1].i2c_addr_flags = PS8743_I2C_ADDR1_FLAG;
+		usb_muxes[USBC_PORT_C1].driver = &ps8743_usb_mux_driver;
+		usb_muxes[USBC_PORT_C1].board_set = &board_ps8743_mux_set;
+	} else {
+		ccprints("PS8740 USB MUX");
+		usb_muxes[USBC_PORT_C1].i2c_addr_flags = PS8740_I2C_ADDR0_FLAG;
+		usb_muxes[USBC_PORT_C1].driver = &ps8740_usb_mux_driver;
+		usb_muxes[USBC_PORT_C1].board_set = NULL;
+	}
+
+	if (ec_config_get_usb_db() == DALBOZ_DB_D_OPT2_USBA_HDMI) {
+		ccprints("DB OPT2 HDMI");
+		ioex_config[IOEX_HDMI_PCAL6408].flags = 0;
+		ioex_init(IOEX_HDMI_PCAL6408);
+		IOEX_USB_A1_RETIMER_EN = IOEX_USB_A1_RETIMER_EN_OPT2;
+		IOEX_USB_A1_CHARGE_EN_DB_L = IOEX_USB_A1_CHARGE_EN_DB_L_OPT2;
+		usb_port_enable[USBA_PORT_A1] = IOEX_EN_USB_A1_5V_DB_OPT2;
+		c1_tcpc_config_interrupt = pcal6408_interrupt;
+		c1_ppc_config_interrupt = hdmi_hpd_interrupt;
+	} else {
+		ccprints("DB OPT1 USBC");
+		ioex_config[IOEX_C1_NCT3807].flags = 0;
+		ioex_init(IOEX_C1_NCT3807);
+		IOEX_USB_A1_RETIMER_EN = IOEX_USB_A1_RETIMER_EN_OPT1;
+		IOEX_USB_A1_CHARGE_EN_DB_L = IOEX_USB_A1_CHARGE_EN_DB_L_OPT1;
+		usb_port_enable[USBA_PORT_A1] = IOEX_EN_USB_A1_5V_DB_OPT1;
+		c1_tcpc_config_interrupt = tcpc_alert_event;
+		c1_ppc_config_interrupt = ppc_interrupt;
+	}
+
+	/* Enable PPC interrupts. */
+	gpio_enable_interrupt(GPIO_USB_C0_PPC_FAULT_ODL);
+	gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL);
+
+	/* Enable TCPC interrupts. */
+	gpio_enable_interrupt(GPIO_USB_C0_TCPC_INT_ODL);
+	gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL);
+
+	/* Enable BC 1.2 interrupts */
+	gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL);
+	gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL);
+
+	/* Enable SBU fault interrupts */
+	ioex_enable_interrupt(IOEX_USB_C0_SBU_FAULT_ODL);
+	ioex_enable_interrupt(IOEX_USB_C1_SBU_FAULT_DB_ODL);
+
+	if (ec_config_has_lid_angle_tablet_mode()) {
+		/* Enable Gyro interrupts */
+		gpio_enable_interrupt(GPIO_6AXIS_INT_L);
+	} else {
+		motion_sensor_count = 0;
+		/* Device is clamshell only */
+		tablet_set_mode(0);
+		/* Gyro is not present, don't allow line to float */
+		gpio_set_flags(GPIO_6AXIS_INT_L, GPIO_INPUT | GPIO_PULL_DOWN);
+	}
+}
+/*
+ * Use HOOK_PRIO_INIT_I2C + 2 to be after ioex_init().
+ */
+DECLARE_HOOK(HOOK_INIT, setup_fw_config, HOOK_PRIO_INIT_I2C + 2);
+
+const struct pwm_t pwm_channels[] = {
+	[PWM_CH_KBLIGHT] = {
+		.channel = 3,
+		.flags = PWM_CONFIG_DSLEEP,
+		.freq = 100,
+	},
+};
+BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
+
+struct ioexpander_config_t ioex_config[] = {
+	[IOEX_C0_NCT3807] = {
+		.i2c_host_port = I2C_PORT_TCPC0,
+		.i2c_slave_addr = NCT38XX_I2C_ADDR1_1_FLAGS,
+		.drv = &nct38xx_ioexpander_drv,
+	},
+	[IOEX_C1_NCT3807] = {
+		.i2c_host_port = I2C_PORT_TCPC1,
+		.i2c_slave_addr = NCT38XX_I2C_ADDR1_1_FLAGS,
+		.drv = &nct38xx_ioexpander_drv,
+		.flags = IOEX_FLAGS_DISABLED,
+	},
+	[IOEX_HDMI_PCAL6408] = {
+		.i2c_host_port = I2C_PORT_TCPC1,
+		.i2c_slave_addr = PCAL6408_I2C_ADDR0,
+		.drv = &pcal6408_ioexpander_drv,
+		.flags = IOEX_FLAGS_DISABLED,
+	},
+};
+BUILD_ASSERT(ARRAY_SIZE(ioex_config) == CONFIG_IO_EXPANDER_PORT_COUNT);
+
+int usb_port_enable[USBA_PORT_COUNT] = {
+	IOEX_EN_USB_A0_5V,
+	IOEX_EN_USB_A1_5V_DB_OPT1,
+};
+
+static void check_v0_battery(void)
+{
+	uint32_t board_version = 0;
+
+	cbi_get_board_version(&board_version);
+
+	if (board_version == 1)
+		I2C_PORT_BATTERY = I2C_PORT_BATTERY_V0;
+}
+/*
+ * Use HOOK_PRIO_INIT_I2C so we re-map before init_battery_type() and
+ * charger_chips_init() want to talk to the battery.
+ */
+DECLARE_HOOK(HOOK_INIT, check_v0_battery, HOOK_PRIO_INIT_I2C);
diff --git a/board/shuboz/board.h b/board/shuboz/board.h
new file mode 100644
index 0000000000..d1bfacaf1d
--- /dev/null
+++ b/board/shuboz/board.h
@@ -0,0 +1,213 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Trembyle board configuration */
+
+#ifndef __CROS_EC_BOARD_H
+#define __CROS_EC_BOARD_H
+
+#define VARIANT_ZORK_DALBOZ
+
+#include <stdbool.h>
+#include "baseboard.h"
+
+#define CONFIG_IO_EXPANDER_PCAL6408
+#define CONFIG_MKBP_USE_GPIO
+
+#define CONFIG_USBC_PPC_NX20P3483
+#define CONFIG_USB_MUX_PS8740
+#define CONFIG_USB_MUX_PS8743
+#define CONFIG_USB_MUX_RUNTIME_CONFIG
+
+#define CONFIG_USB_PD_PORT_MAX_COUNT 2
+#define CONFIG_USB_PORT_ENABLE_DYNAMIC
+
+/* USB-A config */
+#define GPIO_USB1_ILIM_SEL IOEX_USB_A0_CHARGE_EN_L
+#define GPIO_USB2_ILIM_SEL IOEX_USB_A1_CHARGE_EN_DB_L
+
+/* Power  LEDs */
+#define CONFIG_LED_POWER_LED
+
+/* Motion sensing drivers */
+#define CONFIG_ACCELGYRO_LSM6DSM
+#define CONFIG_ACCEL_LSM6DSM_INT_EVENT \
+	TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL)
+#define CONFIG_ACCEL_LIS2DWL
+#define CONFIG_ACCEL_INTERRUPTS
+#define CONFIG_CMD_ACCELS
+#define CONFIG_CMD_ACCEL_INFO
+#define CONFIG_TABLET_MODE
+#define CONFIG_LID_ANGLE
+#define CONFIG_LID_ANGLE_UPDATE
+#define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL
+#define CONFIG_LID_ANGLE_SENSOR_LID LID_ACCEL
+
+
+
+/* GPIO mapping from board specific name to EC common name. */
+#define CONFIG_BATTERY_PRESENT_GPIO	GPIO_EC_BATT_PRES_ODL
+#define CONFIG_SCI_GPIO			GPIO_EC_FCH_SCI_ODL
+#define GPIO_AC_PRESENT			GPIO_ACOK_OD
+#define GPIO_CPU_PROCHOT		GPIO_PROCHOT_ODL
+#define GPIO_EC_INT_L			GPIO_EC_AP_INT_ODL
+#define GPIO_ENABLE_BACKLIGHT_L		GPIO_EC_EDP_BL_DISABLE
+#define GPIO_ENTERING_RW		GPIO_EC_ENTERING_RW
+#define GPIO_KBD_KSO2			GPIO_EC_KSO_02_INV
+#define GPIO_PCH_PWRBTN_L		GPIO_EC_FCH_PWR_BTN_L
+#define GPIO_PCH_RSMRST_L		GPIO_EC_FCH_RSMRST_L
+#define GPIO_PCH_SLP_S3_L		GPIO_SLP_S3_L
+#define GPIO_PCH_SLP_S5_L		GPIO_SLP_S5_L
+#define GPIO_PCH_SYS_PWROK		GPIO_EC_FCH_PWROK
+#define GPIO_PCH_WAKE_L			GPIO_EC_FCH_WAKE_L
+#define GPIO_POWER_BUTTON_L		GPIO_EC_PWR_BTN_ODL
+#define GPIO_S0_PGOOD			GPIO_S0_PWROK_OD
+#define GPIO_S5_PGOOD			GPIO_EC_PWROK_OD
+#define GPIO_SYS_RESET_L		GPIO_EC_SYS_RST_L
+#define GPIO_VOLUME_DOWN_L		GPIO_VOLDN_BTN_ODL
+#define GPIO_VOLUME_UP_L		GPIO_VOLUP_BTN_ODL
+#define GPIO_WP_L			GPIO_EC_WP_L
+#define GPIO_PACKET_MODE_EN		GPIO_EC_H1_PACKET_MODE
+
+#ifndef __ASSEMBLER__
+
+/* This I2C moved. Temporarily detect and support the V0 HW. */
+extern int I2C_PORT_BATTERY;
+
+enum adc_channel {
+	ADC_TEMP_SENSOR_CHARGER,
+	ADC_TEMP_SENSOR_SOC,
+	ADC_CH_COUNT
+};
+
+enum battery_type {
+	BATTERY_SMP,
+	BATTERY_LGC,
+	BATTERY_CEL,
+	BATTERY_TYPE_COUNT,
+};
+
+enum pwm_channel {
+	PWM_CH_KBLIGHT = 0,
+	PWM_CH_COUNT
+};
+
+enum ioex_port {
+	IOEX_C0_NCT3807 = 0,
+	IOEX_C1_NCT3807,
+	IOEX_HDMI_PCAL6408,
+	IOEX_PORT_COUNT
+};
+
+#define PORT_TO_HPD(port) ((port == 0) \
+	? GPIO_USB3_C0_DP2_HPD \
+	: GPIO_DP1_HPD)
+
+enum temp_sensor_id {
+	TEMP_SENSOR_CHARGER = 0,
+	TEMP_SENSOR_SOC,
+	TEMP_SENSOR_CPU,
+	TEMP_SENSOR_COUNT
+};
+
+enum usba_port {
+	USBA_PORT_A0 = 0,
+	USBA_PORT_A1,
+	USBA_PORT_COUNT
+};
+
+enum usbc_port {
+	USBC_PORT_C0 = 0,
+	USBC_PORT_C1,
+	USBC_PORT_COUNT
+};
+
+/*****************************************************************************
+ * CBI EC FW Configuration
+ */
+#include "cbi_ec_fw_config.h"
+
+/**
+ * DALBOZ_MB_USBAC
+ *	USB-A0  Speed: 5 Gbps
+ *		Retimer: none
+ *	USB-C0  Speed: 5 Gbps
+ *		Retimer: none
+ *		TCPC: NCT3807
+ *		PPC: AOZ1380
+ *		IOEX: TCPC
+ */
+enum ec_cfg_usb_mb_type {
+	DALBOZ_MB_USBAC = 0,
+};
+
+/**
+ * DALBOZ_DB_D_OPT1_USBAC
+ *	USB-A1  Speed: 5 Gbps
+ *		Retimer: TUSB522
+ *	USB-C1  Speed: 5 Gbps
+ *		Retimer: PS8740
+ *		TCPC: NCT3807
+ *		PPC: NX20P3483
+ *		IOEX: TCPC
+ *	HDMI    Exists: no
+ *		Retimer: none
+ *		MST Hub: none
+ *
+ * DALBOZ_DB_D_OPT2_USBA_HDMI
+ *	USB-A1  Speed: 5 Gbps
+ *		Retimer: TUSB522
+ *	USB-C1  none
+ *		IOEX: PCAL6408
+ *	HDMI    Exists: yes
+ *		Retimer: PI3HDX1204
+ *		MST Hub: none
+ */
+enum ec_cfg_usb_db_type {
+	DALBOZ_DB_D_OPT1_USBAC = 0,
+	DALBOZ_DB_D_OPT2_USBA_HDMI = 1,
+};
+
+#define HAS_USBC1 \
+			(BIT(DALBOZ_DB_D_OPT1_USBAC))
+
+static inline bool ec_config_has_usbc1(void)
+{
+	return !!(BIT(ec_config_get_usb_db()) &
+		  HAS_USBC1);
+}
+
+#define HAS_USBC1_RETIMER_PS8740 \
+			(BIT(DALBOZ_DB_D_OPT1_USBAC))
+
+static inline bool ec_config_has_usbc1_retimer_ps8740(void)
+{
+	return !!(BIT(ec_config_get_usb_db()) &
+		  HAS_USBC1_RETIMER_PS8740);
+}
+
+#define HAS_HDMI_RETIMER_PI3HDX1204 \
+			(BIT(DALBOZ_DB_D_OPT2_USBA_HDMI))
+
+static inline bool ec_config_has_hdmi_retimer_pi3hdx1204(void)
+{
+	return !!(BIT(ec_config_get_usb_db()) &
+		  HAS_HDMI_RETIMER_PI3HDX1204);
+}
+
+/* These IO expander GPIOs vary with DB option. */
+extern enum gpio_signal IOEX_USB_A1_RETIMER_EN;
+extern enum gpio_signal IOEX_USB_A1_CHARGE_EN_DB_L;
+
+void board_reset_pd_mcu(void);
+
+/* Common definition for the USB PD interrupt handlers. */
+void tcpc_alert_event(enum gpio_signal signal);
+void bc12_interrupt(enum gpio_signal signal);
+void ppc_interrupt(enum gpio_signal signal);
+
+#endif /* !__ASSEMBLER__ */
+
+#endif /* __CROS_EC_BOARD_H */
diff --git a/board/shuboz/build.mk b/board/shuboz/build.mk
new file mode 100644
index 0000000000..1c0cbc4f63
--- /dev/null
+++ b/board/shuboz/build.mk
@@ -0,0 +1,15 @@
+# -*- makefile -*-
+# Copyright 2020 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+#
+# Board specific files build
+#
+
+CHIP:=npcx
+CHIP_FAMILY:=npcx7
+CHIP_VARIANT:=npcx7m7wc
+BASEBOARD:=zork
+
+board-y=board.o led.o
+board-$(CONFIG_BATTERY_SMART)+=battery.o
diff --git a/board/shuboz/ec.tasklist b/board/shuboz/ec.tasklist
new file mode 100644
index 0000000000..d9c1606eb2
--- /dev/null
+++ b/board/shuboz/ec.tasklist
@@ -0,0 +1,26 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/*
+ * See CONFIG_TASK_LIST in config.h for details.
+ */
+
+#define CONFIG_TASK_LIST \
+	TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \
+	TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 1, TASK_STACK_SIZE) \
+	TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \
+	TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \
+	TASK_NOTEST(CHIPSET, chipset_task, NULL, VENTI_TASK_STACK_SIZE) \
+	TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \
+	TASK_ALWAYS(POWERBTN, power_button_task, NULL, VENTI_TASK_STACK_SIZE) \
+	TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \
+	TASK_ALWAYS(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \
+	TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \
+	TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE)
diff --git a/board/shuboz/gpio.inc b/board/shuboz/gpio.inc
new file mode 100644
index 0000000000..8a974f3338
--- /dev/null
+++ b/board/shuboz/gpio.inc
@@ -0,0 +1,141 @@
+/* -*- mode:c -*-
+ *
+ * Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Declare symbolic names for all the GPIOs that we care about.
+ * Note: Those with interrupt handlers must be declared first. */
+
+GPIO_INT(USB_C0_TCPC_INT_ODL,	PIN(3, 4), GPIO_INT_FALLING,			tcpc_alert_event)
+GPIO_INT(USB_C1_TCPC_INT_ODL,	PIN(F, 1), GPIO_INT_FALLING,			c1_tcpc_interrupt)
+GPIO_INT(USB_C0_PPC_FAULT_ODL,	PIN(6, 3), GPIO_INT_FALLING,			ppc_interrupt)
+/* PPC interrupts trigger on falling edge, but HDMI HPD triggers on rising edge. */
+GPIO_INT(USB_C1_PPC_INT_ODL,	PIN(D, 4), GPIO_INT_BOTH | GPIO_PULL_UP, 	c1_ppc_interrupt)
+GPIO_INT(USB_C0_BC12_INT_ODL,	PIN(9, 3), GPIO_INT_FALLING | GPIO_PULL_UP,	bc12_interrupt)
+GPIO_INT(USB_C1_BC12_INT_ODL, 	PIN(A, 4), GPIO_INT_FALLING | GPIO_PULL_UP,	bc12_interrupt)
+GPIO_INT(SLP_S3_L,		PIN(7, 4), GPIO_INT_BOTH,			power_signal_interrupt)
+GPIO_INT(SLP_S5_L,		PIN(E, 0), GPIO_INT_BOTH,			power_signal_interrupt)
+GPIO_INT(S0_PWROK_OD,		PIN(5, 6), GPIO_INT_BOTH,			power_signal_interrupt)
+GPIO_INT(EC_PWROK_OD,		PIN(3, 7), GPIO_INT_BOTH,			power_signal_interrupt)
+GPIO_INT(EC_PWR_BTN_ODL,	PIN(0, 1), GPIO_INT_BOTH,			power_button_interrupt)
+GPIO_INT(LID_OPEN,		PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH,	lid_interrupt)
+GPIO_INT(ACOK_OD,		PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH,	extpower_interrupt)
+GPIO_INT(EC_WP_L,		PIN(5, 0), GPIO_INT_BOTH,			switch_interrupt)
+GPIO_INT(VOLDN_BTN_ODL,		PIN(A, 6), GPIO_INT_BOTH | GPIO_PULL_UP,	button_interrupt)
+GPIO_INT(VOLUP_BTN_ODL,		PIN(9, 5), GPIO_INT_BOTH | GPIO_PULL_UP,	button_interrupt)
+GPIO_INT(6AXIS_INT_L,		PIN(A, 0), GPIO_INT_FALLING | GPIO_PULL_UP,	lsm6dsm_interrupt)
+
+/* GPIO_INT_BOTH is required for PSL wake from hibernate, but we don't need an interrupt handler. */
+GPIO(EC_RST_ODL,		PIN(0, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH)
+
+GPIO(3AXIS_INT_L,		PIN(9, 6), GPIO_INPUT | GPIO_PULL_DOWN)		/* 3 Axis Accel */
+GPIO(CCD_MODE_ODL,		PIN(C, 6), GPIO_INPUT)				/* Case Closed Debug Mode */
+GPIO(PROCHOT_ODL,		PIN(D, 5), GPIO_ODR_HIGH)			/* PROCHOT to SOC */
+GPIO(EC_BATT_PRES_ODL,		PIN(4, 1), GPIO_INPUT)				/* Battery Present */
+GPIO(EC_AP_INT_ODL,		PIN(A, 3), GPIO_ODR_HIGH)			/* Sensor MKBP event to SOC */
+GPIO(EN_PWR_A,			PIN(B, 7), GPIO_OUT_LOW)			/* Enable Power */
+GPIO(EC_EDP_BL_DISABLE,		PIN(A, 2), GPIO_OUT_HIGH)			/* Enable Backlight */
+GPIO(EC_ENTERING_RW,		PIN(E, 5), GPIO_OUT_LOW)			/* EC Entering RW */
+GPIO(EC_FCH_PWR_BTN_L,		PIN(6, 7), GPIO_OUT_HIGH)			/* Power Button to SOC */
+GPIO(EC_FCH_RSMRST_L,		PIN(A, 1), GPIO_OUT_LOW)			/* RSMRST# to SOC */
+GPIO(EC_FCH_PWROK,		PIN(7, 0), GPIO_OUT_LOW)			/* Power OK to SOC */
+GPIO(EC_FCH_WAKE_L,		PIN(0, 3), GPIO_OUT_HIGH)			/* Wake SOC */
+GPIO(EC_FCH_SCI_ODL,		PIN(7, 6), GPIO_ODR_HIGH)			/* SCI to SOC */
+GPIO(EC_SYS_RST_L,		PIN(C, 7), GPIO_ODR_HIGH)			/* Cold Reset to SOC */
+GPIO(USB_C0_TCPC_RST_L,		PIN(E, 1), GPIO_OUT_HIGH)			/* C0 TCPC Reset */
+GPIO(USB_C1_TCPC_RST_L,		PIN(F, 0), GPIO_OUT_HIGH)			/* C1 TCPC Reset */
+GPIO(USB3_C0_DP2_HPD,		PIN(F, 5), GPIO_OUT_LOW)			/* C0 DP Hotplug Detect */
+GPIO(DP1_HPD,			PIN(F, 4), GPIO_OUT_LOW)			/* C1 DP Hotplug Detect */
+GPIO(EC_H1_PACKET_MODE,		PIN(8, 6), GPIO_OUT_LOW)			/* H1 Packet Mode */
+
+UNIMPLEMENTED(PCH_SMI_L)
+
+GPIO(LED_FULL_L,		PIN(6, 0), GPIO_OUT_HIGH)
+GPIO(LED_CHRG_L,		PIN(C, 0), GPIO_OUT_HIGH)
+GPIO(LED3_PWM,			PIN(C, 3), GPIO_OUT_HIGH)
+
+/*
+ * Dalboz has 2 DB options, with different IO expanders. IOEX_C1_NCT3807 is the
+ * OPT1 DB (USB-C1), IOEX_HDMI_PCAL6408 is the OPT2 DB (HDMI).
+ */
+
+IOEX_INT(USB_C0_SBU_FAULT_ODL,	EXPIN(IOEX_C0_NCT3807, 1, 2), GPIO_INT_FALLING, sbu_fault_interrupt)
+IOEX_INT(USB_C1_SBU_FAULT_DB_ODL, EXPIN(IOEX_C1_NCT3807, 1, 2), GPIO_INT_FALLING, sbu_fault_interrupt)
+
+IOEX(USB_C0_FAULT_ODL,		EXPIN(IOEX_C0_NCT3807, 0, 3), GPIO_ODR_HIGH)	/* C0 Fault to SOC */
+IOEX(USB_C0_TCPC_FASTSW_CTL_EN,	EXPIN(IOEX_C0_NCT3807, 0, 4), GPIO_OUT_LOW)	/* C0 FastSwitch Control */
+IOEX(USB_C1_FAULT_ODL,		EXPIN(IOEX_C0_NCT3807, 1, 0), GPIO_ODR_HIGH)	/* C1 Fault to SOC */
+IOEX(USB_C0_PPC_ILIM_3A_EN,	EXPIN(IOEX_C0_NCT3807, 1, 1), GPIO_OUT_LOW)	/* C0 3A Current Limit Enable */
+IOEX(KB_BL_EN,			EXPIN(IOEX_C0_NCT3807, 1, 3), GPIO_OUT_LOW)	/* KB Backlight Enable */
+IOEX(EN_USB_A0_5V,		EXPIN(IOEX_C0_NCT3807, 1, 5), GPIO_OUT_LOW)	/* A0 5V Source Enable */
+IOEX(USB_A0_CHARGE_EN_L,	EXPIN(IOEX_C0_NCT3807, 1, 6), GPIO_OUT_HIGH)	/* A0 5V High Current Enable */
+IOEX(USB_C0_SBU_FLIP,		EXPIN(IOEX_C0_NCT3807, 1, 7), GPIO_OUT_LOW)	/* C0 SBU Flip */
+
+IOEX(USB_A1_RETIMER_EN_OPT1,	EXPIN(IOEX_C1_NCT3807, 0, 0), GPIO_OUT_LOW)	/* A1 Retimer Enable */
+IOEX(USB_C1_HPD_IN_DB,		EXPIN(IOEX_C1_NCT3807, 0, 2), GPIO_OUT_LOW)	/* C1 HPD */
+IOEX(USB_C1_TCPC_FASTSW_CTL_EN,	EXPIN(IOEX_C1_NCT3807, 0, 4), GPIO_OUT_LOW)	/* C1 FastSwitch Control */
+IOEX(USB_C1_PPC_EN_L,		EXPIN(IOEX_C1_NCT3807, 1, 3), GPIO_OUT_LOW)	/* C1 PPC Enable */
+IOEX(USB_C1_DATA_EN,		EXPIN(IOEX_C1_NCT3807, 1, 5), GPIO_OUT_HIGH)	/* C1 Retimer Enable */
+IOEX(EN_USB_A1_5V_DB_OPT1,	EXPIN(IOEX_C1_NCT3807, 1, 6), GPIO_OUT_LOW)	/* A1 5V Source Enable */
+IOEX(USB_A1_CHARGE_EN_DB_L_OPT1,EXPIN(IOEX_C1_NCT3807, 1, 7), GPIO_OUT_HIGH)	/* A1 5V High Current Enable */
+
+IOEX(USB_A1_RETIMER_EN_OPT2,	EXPIN(IOEX_HDMI_PCAL6408, 0, 0), GPIO_OUT_LOW)	/* A1 Retimer Enable */
+IOEX(EN_USB_A1_5V_DB_OPT2,	EXPIN(IOEX_HDMI_PCAL6408, 0, 1), GPIO_OUT_LOW)	/* A1 5V Source Enable */
+IOEX(USB_A1_CHARGE_EN_DB_L_OPT2,EXPIN(IOEX_HDMI_PCAL6408, 0, 2), GPIO_OUT_HIGH)	/* A1 5V High Current Enable */
+IOEX(HDMI_DATA_EN_DB,		EXPIN(IOEX_HDMI_PCAL6408, 0, 3), GPIO_OUT_HIGH)	/* HDMI Retimer Enable */
+IOEX(EN_PWR_HDMI_DB,		EXPIN(IOEX_HDMI_PCAL6408, 0, 5), GPIO_OUT_LOW)	/* HDMI Retimer Power Enable */
+
+/*
+ * The NPCX LPC driver configures and controls SCI, so PCH_SCI_ODL [PIN(7, 6)]
+ * is not defined here as GPIO.
+ */
+
+/* I2C pins - these will be reconfigured for alternate function below */
+GPIO(EC_I2C_USB_A0_C0_SCL,	PIN(B, 5), GPIO_INPUT)
+GPIO(EC_I2C_USB_A0_C0_SDA,	PIN(B, 4), GPIO_INPUT)
+GPIO(EC_I2C_USB_A1_C1_SCL,	PIN(9, 0), GPIO_INPUT)
+GPIO(EC_I2C_USB_A1_C1_SDA,	PIN(8, 7), GPIO_INPUT)
+GPIO(EC_I2C_POWER_SCL,		PIN(9, 2), GPIO_INPUT)
+GPIO(EC_I2C_POWER_SDA,		PIN(9, 1), GPIO_INPUT)
+GPIO(EC_I2C_USBC_AP_MUX_SCL,	PIN(D, 1), GPIO_INPUT)
+GPIO(EC_I2C_USBC_AP_MUX_SDA,	PIN(D, 0), GPIO_INPUT)
+GPIO(FCH_SIC,			PIN(F, 3), GPIO_INPUT)
+GPIO(FCH_SID,			PIN(F, 2), GPIO_INPUT)
+GPIO(EC_I2C_SENSOR_CBI_SCL,	PIN(3, 3), GPIO_INPUT)
+GPIO(EC_I2C_SENSOR_CBI_SDA,	PIN(3, 6), GPIO_INPUT)
+GPIO(I2C_AUDIO_USB_HUB_SCL,	PIN(E, 4), GPIO_INPUT | GPIO_SEL_1P8V)
+GPIO(I2C_AUDIO_USB_HUB_SDA,	PIN(E, 3), GPIO_INPUT | GPIO_SEL_1P8V)
+GPIO(EC_I2C_BATT_SCL,		PIN(B, 3), GPIO_INPUT)
+GPIO(EC_I2C_BATT_SDA,		PIN(B, 2), GPIO_INPUT)
+
+ALTERNATE(PIN_MASK(6, BIT(4) | BIT(5)), 0, MODULE_UART, 0) /* Cr50 requires no pullups. */
+
+ALTERNATE(PIN_MASK(B, BIT(4) | BIT(5)), 0, MODULE_I2C, 0)			/* I2C0 */
+ALTERNATE(PIN_MASK(9, BIT(0) | BIT(1) | BIT(2)), 0, MODULE_I2C, 0)		/* I2C1 SCL / I2C2 */
+ALTERNATE(PIN_MASK(8, BIT(7)), 0, MODULE_I2C, 0)				/* I2C1 SDA */
+ALTERNATE(PIN_MASK(D, BIT(0) | BIT(1)), 0, MODULE_I2C, 0)			/* I2C3 */
+ALTERNATE(PIN_MASK(F, BIT(2) | BIT(3)), 0, MODULE_I2C, 0)			/* I2C4 */
+ALTERNATE(PIN_MASK(3, BIT(3) | BIT(6)), 0, MODULE_I2C, 0)			/* I2C5 */
+ALTERNATE(PIN_MASK(E, BIT(3) | BIT(4)), 0, MODULE_I2C, 0)			/* I2C6 */
+ALTERNATE(PIN_MASK(B, BIT(2) | BIT(3)), 0, MODULE_I2C, 0)			/* I2C7 */
+
+ALTERNATE(PIN_MASK(4, BIT(2) | BIT(3)), 0, MODULE_ADC, 0)			/* ADC2, ADC3 Temp Sensors */
+
+ALTERNATE(PIN_MASK(8, BIT(0)), 0, MODULE_PWM, 0)				/* PWM3 KB Backlight */
+
+ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_INPUT)		/* KSI_00-01 */
+ALTERNATE(PIN_MASK(2, 0xFC), 0, MODULE_KEYBOARD_SCAN, GPIO_INPUT)		/* KSI_02-07 */
+ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH)		/* KSO_00-01 */
+GPIO(EC_KSO_02_INV, PIN(1, 7), GPIO_OUT_LOW)					/* KSO_02 inverted */
+ALTERNATE(PIN_MASK(1, 0x7F), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH)		/* KSO_03-09 */
+ALTERNATE(PIN_MASK(0, 0xE0), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH)		/* KSO_10-12 */
+
+/* Power Switch Logic (PSL) inputs */
+ALTERNATE(PIN_MASK(0, BIT(0) | BIT(1) | BIT(2)), 0, MODULE_PMU, 0)		/* AC_PRESENT, POWER_BUTTON_L, EC_RST_ODL */
+ALTERNATE(PIN_MASK(D, BIT(2)), 0, MODULE_PMU, 0)				/* LID_OPEN */
+
+ALTERNATE(PIN_MASK(A, 0xA0), 1,  MODULE_WOV, 0) 				/* I2S_SYNC/I2S_SCLK  GPIOA5/A7 */
+ALTERNATE(PIN_MASK(B, 0x01), 1,  MODULE_WOV, 0) 				/* I2S_SDAT           GPIOB0    */
+ALTERNATE(PIN_MASK(9, 0x90), 1,  MODULE_WOV, 0) 				/* DMIC_CLK/DMIC_IN   GPIO94/97 */
diff --git a/board/shuboz/led.c b/board/shuboz/led.c
new file mode 100644
index 0000000000..92424092e5
--- /dev/null
+++ b/board/shuboz/led.c
@@ -0,0 +1,105 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include "ec_commands.h"
+#include "gpio.h"
+#include "led_common.h"
+#include "led_onoff_states.h"
+
+#define LED_OFF_LVL	1
+#define LED_ON_LVL	0
+
+const int led_charge_lvl_1;
+const int led_charge_lvl_2 = 100;
+
+struct led_descriptor led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = {
+	[STATE_CHARGING_LVL_1]       = {{EC_LED_COLOR_GREEN,  2 * LED_ONE_SEC},
+					{EC_LED_COLOR_RED, 2 * LED_ONE_SEC} },
+	[STATE_CHARGING_LVL_2]	     = {{EC_LED_COLOR_RED, LED_INDEFINITE} },
+	[STATE_CHARGING_FULL_CHARGE] = {{EC_LED_COLOR_GREEN,  LED_INDEFINITE} },
+	[STATE_DISCHARGE_S0]	     = {{EC_LED_COLOR_GREEN,  LED_INDEFINITE} },
+	[STATE_DISCHARGE_S3]	     = {{EC_LED_COLOR_RED, 1 * LED_ONE_SEC},
+					{LED_OFF,            3 * LED_ONE_SEC} },
+	[STATE_DISCHARGE_S5]         = {{LED_OFF,            LED_INDEFINITE} },
+	[STATE_BATTERY_ERROR]        = {{EC_LED_COLOR_GREEN,  2 * LED_ONE_SEC},
+					{EC_LED_COLOR_RED, 2 * LED_ONE_SEC} },
+	[STATE_FACTORY_TEST]         = {{EC_LED_COLOR_GREEN,  LED_INDEFINITE} },
+};
+
+BUILD_ASSERT(ARRAY_SIZE(led_bat_state_table) == LED_NUM_STATES);
+
+const struct led_descriptor
+		led_pwr_state_table[PWR_LED_NUM_STATES][LED_NUM_PHASES] = {
+	[PWR_LED_STATE_ON]           = {{EC_LED_COLOR_WHITE, LED_INDEFINITE} },
+	[PWR_LED_STATE_SUSPEND_AC]   = {{EC_LED_COLOR_WHITE, 3 * LED_ONE_SEC},
+				{LED_OFF,          0.5 * LED_ONE_SEC} },
+	[PWR_LED_STATE_SUSPEND_NO_AC] = {{LED_OFF, LED_INDEFINITE} },
+	[PWR_LED_STATE_OFF]           = {{LED_OFF, LED_INDEFINITE} },
+};
+
+BUILD_ASSERT(ARRAY_SIZE(led_pwr_state_table) == PWR_LED_NUM_STATES);
+
+const enum ec_led_id supported_led_ids[] = {
+	EC_LED_ID_BATTERY_LED,
+	EC_LED_ID_POWER_LED
+};
+
+const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids);
+
+void led_set_color_power(enum ec_led_colors color)
+{
+	if (color == EC_LED_COLOR_WHITE)
+		gpio_set_level(GPIO_LED3_PWM, LED_ON_LVL);
+	else
+		/* LED_OFF and unsupported colors */
+		gpio_set_level(GPIO_LED3_PWM, LED_OFF_LVL);
+}
+
+void led_set_color_battery(enum ec_led_colors color)
+{
+	switch (color) {
+	case EC_LED_COLOR_GREEN:
+		gpio_set_level(GPIO_LED_FULL_L, LED_ON_LVL);
+		gpio_set_level(GPIO_LED_CHRG_L, LED_OFF_LVL);
+		break;
+	case EC_LED_COLOR_RED:
+		gpio_set_level(GPIO_LED_FULL_L, LED_OFF_LVL);
+		gpio_set_level(GPIO_LED_CHRG_L, LED_ON_LVL);
+		break;
+	default: /* LED_OFF and other unsupported colors */
+		gpio_set_level(GPIO_LED_FULL_L, LED_OFF_LVL);
+		gpio_set_level(GPIO_LED_CHRG_L, LED_OFF_LVL);
+		break;
+	}
+}
+
+void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range)
+{
+	if (led_id == EC_LED_ID_BATTERY_LED) {
+		brightness_range[EC_LED_COLOR_GREEN] = 1;
+		brightness_range[EC_LED_COLOR_RED] = 1;
+	} else if (led_id == EC_LED_ID_POWER_LED) {
+		brightness_range[EC_LED_COLOR_WHITE] = 1;
+	}
+}
+
+int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness)
+{
+	if (led_id == EC_LED_ID_BATTERY_LED) {
+		if (brightness[EC_LED_COLOR_GREEN] != 0)
+			led_set_color_battery(EC_LED_COLOR_GREEN);
+		else if (brightness[EC_LED_COLOR_RED] != 0)
+			led_set_color_battery(EC_LED_COLOR_RED);
+		else
+			led_set_color_battery(LED_OFF);
+	} else if (led_id == EC_LED_ID_POWER_LED) {
+		if (brightness[EC_LED_COLOR_WHITE] != 0)
+			led_set_color_power(EC_LED_COLOR_WHITE);
+		else
+			led_set_color_power(LED_OFF);
+	}
+
+	return EC_SUCCESS;
+}