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| author | Jack Rosenthal <jrosenth@chromium.org> | 2022-06-27 13:40:07 -0600 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-06-29 18:42:39 +0000 |
| commit | ebf825a72a25d49d989981febd4b39aec311b338 (patch) | |
| tree | 9defbb0b214a1eb6ca38d25d49811c8bc039ba41 | |
| parent | 5aa17b087f9ba956d77efd8eec292383c38fe4e3 (diff) | |
| download | chrome-ec-ebf825a72a25d49d989981febd4b39aec311b338.tar.gz | |
board/it8xxx2_pdevb/board.c: Format with clang-format
BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I78b7d23ccc42f44af826f0bd953ffc43909a82ea
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3728513
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
| -rw-r--r-- | board/it8xxx2_pdevb/board.c | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/board/it8xxx2_pdevb/board.c b/board/it8xxx2_pdevb/board.c index 9161b2ce2e..46198f406b 100644 --- a/board/it8xxx2_pdevb/board.c +++ b/board/it8xxx2_pdevb/board.c @@ -14,12 +14,12 @@ #include "timer.h" #include "usb_pd_tcpm.h" -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args) -#define USB_PD_PORT_ITE_0 0 -#define USB_PD_PORT_ITE_1 1 -#define USB_PD_PORT_ITE_2 2 -#define RESISTIVE_DIVIDER 11 +#define USB_PD_PORT_ITE_0 0 +#define USB_PD_PORT_ITE_1 1 +#define USB_PD_PORT_ITE_2 2 +#define RESISTIVE_DIVIDER 11 int board_get_battery_soc(void) { @@ -83,7 +83,7 @@ void board_pd_vbus_ctrl(int port, int enabled) gpio_set_level(GPIO_USBPD_PORTA_VBUS_OUTPUT, enabled); if (!enabled) { gpio_set_level(GPIO_USBPD_PORTA_VBUS_DROP, 1); - udelay(10*MSEC); /* 10ms is a try and error value */ + udelay(10 * MSEC); /* 10ms is a try and error value */ } gpio_set_level(GPIO_USBPD_PORTA_VBUS_DROP, 0); } else if (port == USBPD_PORT_B) { @@ -91,7 +91,7 @@ void board_pd_vbus_ctrl(int port, int enabled) gpio_set_level(GPIO_USBPD_PORTB_VBUS_OUTPUT, enabled); if (!enabled) { gpio_set_level(GPIO_USBPD_PORTB_VBUS_DROP, 1); - udelay(10*MSEC); /* 10ms is a try and error value */ + udelay(10 * MSEC); /* 10ms is a try and error value */ } gpio_set_level(GPIO_USBPD_PORTB_VBUS_DROP, 0); } else if (port == USBPD_PORT_C) { @@ -99,13 +99,13 @@ void board_pd_vbus_ctrl(int port, int enabled) gpio_set_level(GPIO_USBPD_PORTC_VBUS_OUTPUT, enabled); if (!enabled) { gpio_set_level(GPIO_USBPD_PORTC_VBUS_DROP, 1); - udelay(10*MSEC); /* 10ms is a try and error value */ + udelay(10 * MSEC); /* 10ms is a try and error value */ } gpio_set_level(GPIO_USBPD_PORTC_VBUS_DROP, 0); } if (enabled) - udelay(10*MSEC); /* 10ms is a try and error value */ + udelay(10 * MSEC); /* 10ms is a try and error value */ } void pd_set_input_current_limit(int port, uint32_t max_ma, @@ -120,8 +120,7 @@ void pd_set_input_current_limit(int port, uint32_t max_ma, * so use the same frequency and prescaler register setting is required if * number of pwm channel greater than three. */ -const struct pwm_t pwm_channels[] = { -}; +const struct pwm_t pwm_channels[] = {}; BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); /* ADC channels. Must be in the exactly same order as in enum adc_channel. */ |