diff options
| author | Eric Yilun Lin <yllin@chromium.org> | 2021-08-13 09:36:40 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-08-16 05:41:21 +0000 |
| commit | 58261fe2767ac47e657a5211809cd1e2b72715b1 (patch) | |
| tree | 23c5dfb505389e61004557433cafb32568a75531 | |
| parent | 9ee98c2be1649460d71a16fffa2a935ef50f568e (diff) | |
| download | chrome-ec-58261fe2767ac47e657a5211809cd1e2b72715b1.tar.gz | |
usbpd: do not enter DP mode in S5->S3 transition
If DUTs enter mode in S5->S3, and the mux would be re-configured
after in S3 and make the DP alt mode not correctly function.
BUG=b:194031794
TEST=plug DP dongle in S5/G3 on Asurada, boot to S0, and see display
BRANCH=asurada
Change-Id: Iee0ea2549e68ca7effc8cc538c22f4d388f10943
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3093347
Reviewed-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
(cherry picked from commit b1e287f83f45e9b8217b7249c335369e1a3e873c)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3096810
Tested-by: Eric Yilun Lin <yllin@google.com>
Auto-Submit: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
| -rw-r--r-- | common/usb_pd_alt_mode_dfp.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/common/usb_pd_alt_mode_dfp.c b/common/usb_pd_alt_mode_dfp.c index 700af4ea25..9ba6c3841f 100644 --- a/common/usb_pd_alt_mode_dfp.c +++ b/common/usb_pd_alt_mode_dfp.c @@ -1151,10 +1151,11 @@ __overridable int svdm_enter_dp_mode(int port, uint32_t mode_caps) * if we don't need to maintain HPD connectivity info in a low power * mode, then we shall exit DP Alt Mode. (This is why we don't enter * when the SoC is off as opposed to suspend where adding a display - * could cause a wake up.) + * could cause a wake up.) When in S5->S3 transition state, we + * should treat it as a SoC off state. */ #ifdef HAS_TASK_CHIPSET - if (chipset_in_state(CHIPSET_STATE_ANY_OFF)) + if (!chipset_in_state(CHIPSET_STATE_ANY_SUSPEND | CHIPSET_STATE_ON)) return -1; #endif /* Only enter mode if device is DFP_D capable */ |