diff options
| author | Tom Hughes <tomhughes@chromium.org> | 2020-05-14 14:33:36 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-05-22 19:22:14 +0000 |
| commit | 67665bb55473e64da629df0546245e61e810927b (patch) | |
| tree | 0d1b38bff2cc9078e877304d554aec9409536b48 | |
| parent | 7177f1832161f56a355c94912c1442d1af9c67a8 (diff) | |
| download | chrome-ec-67665bb55473e64da629df0546245e61e810927b.tar.gz | |
core/cortex-m: create private MPU header for use by unit tests
Expose definitions that we want to use in unit tests, but are internal
details that should not be used by other EC code using the rollback
functionality.
BRANCH=none
BUG=b:155229277, b:156501835
TEST=make buildall -j
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: Iab14a0cf17d4a986f1a1d9b77d27957976962078
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2202851
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Yicheng Li <yichengli@chromium.org>
Tested-by: Yicheng Li <yichengli@chromium.org>
| -rw-r--r-- | core/cortex-m/include/mpu_private.h | 24 | ||||
| -rw-r--r-- | core/cortex-m/mpu.c | 10 |
2 files changed, 29 insertions, 5 deletions
diff --git a/core/cortex-m/include/mpu_private.h b/core/cortex-m/include/mpu_private.h new file mode 100644 index 0000000000..3e52b35c76 --- /dev/null +++ b/core/cortex-m/include/mpu_private.h @@ -0,0 +1,24 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * @file + * + * @brief Private header file. Not meant to be used outside of mpu.c and tests. + */ + +#ifndef __CROS_EC_MPU_PRIVATE_H +#define __CROS_EC_MPU_PRIVATE_H + +int mpu_num_regions(void); +bool has_mpu(void); +bool mpu_is_unified(void); +void mpu_disable(void); +int mpu_update_region(uint8_t region, uint32_t addr, uint8_t size_bit, + uint16_t attr, uint8_t enable, uint8_t srd); +int mpu_config_region(uint8_t region, uint32_t addr, uint32_t size, + uint16_t attr, uint8_t enable); + +#endif /* __CROS_EC_MPU_PRIVATE_H */ diff --git a/core/cortex-m/mpu.c b/core/cortex-m/mpu.c index 0724034436..7735c2d823 100644 --- a/core/cortex-m/mpu.c +++ b/core/cortex-m/mpu.c @@ -50,8 +50,8 @@ bool mpu_is_unified(void) * * Based on 3.1.4.1 'Updating an MPU Region' of Stellaris LM4F232H5QC Datasheet */ -static int mpu_update_region(uint8_t region, uint32_t addr, uint8_t size_bit, - uint16_t attr, uint8_t enable, uint8_t srd) +int mpu_update_region(uint8_t region, uint32_t addr, uint8_t size_bit, + uint16_t attr, uint8_t enable, uint8_t srd) { /* * Note that on the Cortex-M3, Cortex-M4, and Cortex-M7, the base @@ -99,8 +99,8 @@ static int mpu_update_region(uint8_t region, uint32_t addr, uint8_t size_bit, * * Returns EC_SUCCESS on success or -EC_ERROR_INVAL if a parameter is invalid. */ -static int mpu_config_region(uint8_t region, uint32_t addr, uint32_t size, - uint16_t attr, uint8_t enable) +int mpu_config_region(uint8_t region, uint32_t addr, uint32_t size, + uint16_t attr, uint8_t enable) { int rv; int size_bit = 0; @@ -189,7 +189,7 @@ void mpu_enable(void) MPU_CTRL |= MPU_CTRL_PRIVDEFEN | MPU_CTRL_HFNMIENA | MPU_CTRL_ENABLE; } -static void mpu_disable(void) +void mpu_disable(void) { MPU_CTRL &= ~(MPU_CTRL_PRIVDEFEN | MPU_CTRL_HFNMIENA | MPU_CTRL_ENABLE); } |