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| author | Daniel Coggin <dcoggin@google.com> | 2022-04-11 15:07:42 -0700 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-04-13 22:00:17 +0000 |
| commit | 8407b1602e28a2e1eed233b972cca8499eba430d (patch) | |
| tree | 32b62dd0101124315fb7089dbd8d0fcbb676c373 | |
| parent | fb9f61782d452b106b9d9c4325fd473dcb4a7d8c (diff) | |
| download | chrome-ec-8407b1602e28a2e1eed233b972cca8499eba430d.tar.gz | |
brask: Minimum power on requirement
Set CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON to 45w and correct two typos.
BUG=b:197475210
BRANCH=None
TEST=make BOARD=brask, flashed, 18w USB-C PD flashes red LED
Change-Id: Iec17ffc4276daa4cbe8623119a99b7e44923acd6
Signed-off-by: Daniel Coggin <dcoggin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3582371
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
| -rw-r--r-- | baseboard/brask/baseboard.h | 7 | ||||
| -rw-r--r-- | board/brask/board.c | 4 |
2 files changed, 3 insertions, 8 deletions
diff --git a/baseboard/brask/baseboard.h b/baseboard/brask/baseboard.h index 66a10c7197..dd7be91500 100644 --- a/baseboard/brask/baseboard.h +++ b/baseboard/brask/baseboard.h @@ -59,12 +59,7 @@ /* Support Barrel Jack */ #undef CONFIG_DEDICATED_CHARGE_PORT_COUNT #define CONFIG_DEDICATED_CHARGE_PORT_COUNT 1 -/* - * TODO(b/197475210): Don't allow the system to boot to S0 when - * the power is lower than CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON - * since there is no battery. - */ -#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON 30000 +#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON 45000 /* Chipset config */ #define CONFIG_CHIPSET_ALDERLAKE_SLG4BD44540 diff --git a/board/brask/board.c b/board/brask/board.c index 022ce8f43c..304fe58ce6 100644 --- a/board/brask/board.c +++ b/board/brask/board.c @@ -158,11 +158,11 @@ static void update_5v_usage(void) base_5v_power_s5 += PWR_S5_FRONT_HIGH - PWR_S5_FRONT_LOW; if (!gpio_get_level(GPIO_USB_A2_OC_ODL)) { - front_ports++; + rear_ports++; base_5v_power_s5 += PWR_S5_REAR_LOW; } if (!gpio_get_level(GPIO_USB_A3_OC_ODL)) { - front_ports++; + rear_ports++; base_5v_power_s5 += PWR_S5_REAR_LOW; } /* |