summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorPeter Marheine <pmarheine@chromium.org>2022-03-29 15:04:11 +1100
committerChromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com>2022-03-29 07:31:33 +0000
commit05c231aaaffc22cddb417d85f0568f7b1fd1ed71 (patch)
tree43a2381e78893a1ea0f6b52bfb98a307b028af48
parent11152c90a29237e72fb3d566bebb6006851e6c3d (diff)
downloadchrome-ec-05c231aaaffc22cddb417d85f0568f7b1fd1ed71.tar.gz
nissa/nereid: increase C1 charger interrupt priority
Drawcia uses the same general topology on USB-C where chargers and TCPCs share an interrupt line, which was found to cause problems with excessive interrupt latency and fixed in commit e858299538e00490ccbab65e199307c455a7d1c8. This change does the same prioritization for Nereid. BUG=b:226669197 TEST=PD is no longer flaky on C1 with some partners sending hard resets BRANCH=none Change-Id: Ied32abc07f1b1c9b3c89130941f87cd469435630 Signed-off-by: Peter Marheine <pmarheine@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3554376 Reviewed-by: Andrew McRae <amcrae@google.com>
-rw-r--r--zephyr/projects/nissa/src/nereid/usbc.c24
1 files changed, 23 insertions, 1 deletions
diff --git a/zephyr/projects/nissa/src/nereid/usbc.c b/zephyr/projects/nissa/src/nereid/usbc.c
index 6ae6edba51..0f9bed4340 100644
--- a/zephyr/projects/nissa/src/nereid/usbc.c
+++ b/zephyr/projects/nissa/src/nereid/usbc.c
@@ -282,7 +282,7 @@ static void notify_c1_chips(void)
{
schedule_deferred_pd_interrupt(1);
task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12);
- sm5803_interrupt(1);
+ /* Charger is handled in board_process_pd_alert */
}
static void check_c1_line(void)
@@ -309,6 +309,28 @@ void usb_c1_interrupt(enum gpio_signal s)
hook_call_deferred(&check_c1_line_data, INT_RECHECK_US);
}
+/*
+ * Handle charger interrupts in the PD task. Not doing so can lead to a priority
+ * inversion where we fail to respond to TCPC alerts quickly enough because we
+ * don't get another edge on a shared IRQ until the charger interrupt is cleared
+ * (or the IRQ is polled again), which happens in the low-priority charger task:
+ * the high-priority type-C handler is thus blocked on the lower-priority
+ * charger.
+ *
+ * To avoid that, we run charger interrupts at the same priority.
+ */
+void board_process_pd_alert(int port)
+{
+ /*
+ * Port 0 doesn't use an external TCPC, so its interrupts don't need
+ * this special handling.
+ */
+ if (port == 1 &&
+ !gpio_pin_get_dt(GPIO_DT_FROM_ALIAS(gpio_usb_c1_int_odl))) {
+ sm5803_handle_interrupt(port);
+ }
+}
+
int pd_snk_is_vbus_provided(int port)
{
int chg_det = 0;