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| author | Ting Shen <phoenixshen@google.com> | 2021-04-22 14:36:08 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-10-12 04:06:37 +0000 |
| commit | 0e463edb8c87211b8b8ee3c53ddb44e909d3977a (patch) | |
| tree | fab231ebce8145d627ef60cd743051a2967c7881 | |
| parent | 0c0797019c370affe03d8265c5fb9ab541ed4984 (diff) | |
| download | chrome-ec-0e463edb8c87211b8b8ee3c53ddb44e909d3977a.tar.gz | |
cherry: enable EFS2
BUG=b:185726892
BRANCH=main
TEST=Verify EFS2 works, see CL:3207813
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I1e95cd1532abdcb097e4a81d30742dd08f77c46d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2845562
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
| -rw-r--r-- | baseboard/cherry/baseboard.h | 7 | ||||
| -rw-r--r-- | board/cherry/gpio.inc | 2 |
2 files changed, 8 insertions, 1 deletions
diff --git a/baseboard/cherry/baseboard.h b/baseboard/cherry/baseboard.h index 387408ed59..2a4705e541 100644 --- a/baseboard/cherry/baseboard.h +++ b/baseboard/cherry/baseboard.h @@ -189,6 +189,13 @@ #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_USE_GPIO +/* Vboot Config */ +#define CONFIG_CRC8 +#define CONFIG_VBOOT_EFS2 +#define CONFIG_VBOOT_HASH +#define CONFIG_VSTORE +#define CONFIG_VSTORE_SLOT_COUNT 1 + /* Voltage regulator control */ #define CONFIG_HOSTCMD_REGULATOR diff --git a/board/cherry/gpio.inc b/board/cherry/gpio.inc index bf3a3a3210..3a64f56d47 100644 --- a/board/cherry/gpio.inc +++ b/board/cherry/gpio.inc @@ -92,6 +92,7 @@ GPIO(EN_EC_ID_ODL, PIN(H, 5), GPIO_ODR_LOW) GPIO(ENTERING_RW, PIN(C, 5), GPIO_OUT_LOW) /* EC_ENTERING_RW */ GPIO(EN_5V_USM, PIN(G, 3), GPIO_OUT_LOW) GPIO(USB_A0_FAULT_ODL, PIN(J, 6), GPIO_INPUT) +GPIO(PACKET_MODE_EN, PIN(D, 4), GPIO_OUT_LOW) /* EC_GSC_PACKET_MODE */ /* I2C pins - Alternate function below configures I2C module on these pins */ GPIO(I2C_A_SCL, PIN(B, 3), GPIO_INPUT) /* I2C_CHG_BATT_SCL */ @@ -127,7 +128,6 @@ ALTERNATE(PIN_MASK(M, 0x33), 0, MODULE_SPI, 0) /* SPI */ /* Unimplemented Pins */ GPIO(PG_PP5000_S5_OD, PIN(D, 2), GPIO_INPUT) -GPIO(EC_GSC_PACKET_MODE, PIN(D, 4), GPIO_INPUT | GPIO_PULL_DOWN) /* *_ODL pin has external pullup so don't pull it down. */ GPIO(PG_MT6315_GPU_ODL, PIN(H, 6), GPIO_INPUT) /* reserved for future use */ |