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authorMary Ruthven <mruthven@google.com>2018-10-15 17:32:05 -0700
committerVadim Bendebury <vbendeb@chromium.org>2019-09-21 19:11:20 -0700
commitaedf64b5c0e68499a4a981dfb3002df0a788949d (patch)
treef75f7870c984b43d207e183d86a62b426f9c3b06
parent91cd2eeeed3c2bac98b3ffb336952d1b44e91d01 (diff)
downloadchrome-ec-aedf64b5c0e68499a4a981dfb3002df0a788949d.tar.gz
cr50: make sys_rst_l_out pseudo open drain (take two)
The existing SYS_RST_L implementation enables the output on SYS_RST_L before setting the level to 0, which results in cr50 briefly driving SYS_RST_L high when SYS_RST_L is asserted. This patch switches SYS_RST_L to a pseudo open drain mode, which eliminates the pulse. The internal pull up on SYS_RST_L is not being removed, so the H1 will still pull this line up when SYS_RST_L output is set to 1. Removing the pull up will require careful analysis of existing designs, and if safe will be done in a different patch. BUG=b:117676461 BRANCH=cr50 TEST=assert/deassert sys_rst_l and check that 'sysrst' shows the correct state. Verify this works on cheza which only pulls SYS_RST_L up to 1.8V even though VDDIOM is 3.3V. Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1282020 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> (cherry picked from commit 9d09e1f04007c3fef98d35e5514fcaa2fea237ce) Change-Id: I6a6d5a7bbc51a8fdd6dbd5a07bbfdc06a3cbaf09 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1644272 Tested-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Vadim Bendebury <vbendeb@chromium.org> (cherry picked from commit 499f1c5eb22011bbf26bf9e2a6f3891a13f0e972) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1705373 (cherry picked from commit e7a38365f3e22fc417789206c60d521c533b2566)
-rw-r--r--board/cr50/board.c29
-rw-r--r--board/cr50/board.h3
-rw-r--r--board/cr50/gpio.inc11
3 files changed, 14 insertions, 29 deletions
diff --git a/board/cr50/board.c b/board/cr50/board.c
index a8391cb100..08dea9f5a1 100644
--- a/board/cr50/board.c
+++ b/board/cr50/board.c
@@ -934,40 +934,23 @@ void tpm_rst_deasserted(enum gpio_signal signal)
void assert_sys_rst(void)
{
- /*
- * We don't have a good (any?) way to easily look up the pinmux/gpio
- * assignments in gpio.inc, so they're hard-coded in this routine. This
- * assertion is just to ensure it hasn't changed.
- */
- ASSERT(GREAD(PINMUX, GPIO0_GPIO4_SEL) == GC_PINMUX_DIOM0_SEL);
-
- /* Set SYS_RST_L_OUT as an output, connected to the pad */
- GWRITE(PINMUX, DIOM0_SEL, GC_PINMUX_GPIO0_GPIO4_SEL);
- gpio_set_flags(GPIO_SYS_RST_L_OUT, GPIO_OUT_HIGH);
-
/* Assert it */
gpio_set_level(GPIO_SYS_RST_L_OUT, 0);
}
void deassert_sys_rst(void)
{
- ASSERT(GREAD(PINMUX, GPIO0_GPIO4_SEL) == GC_PINMUX_DIOM0_SEL);
-
- /* Deassert SYS_RST_L */
+ /* Deassert it */
gpio_set_level(GPIO_SYS_RST_L_OUT, 1);
-
- /* Set SYS_RST_L_OUT as an input, disconnected from the pad */
- gpio_set_flags(GPIO_SYS_RST_L_OUT, GPIO_INPUT);
- GWRITE(PINMUX, DIOM0_SEL, 0);
}
int is_sys_rst_asserted(void)
{
- return (GREAD(PINMUX, DIOM0_SEL) == GC_PINMUX_GPIO0_GPIO4_SEL)
-#ifdef CONFIG_CMD_GPIO_EXTENDED
- && (gpio_get_flags(GPIO_SYS_RST_L_OUT) & GPIO_OUTPUT)
-#endif
- && (gpio_get_level(GPIO_SYS_RST_L_OUT) == 0);
+ /*
+ * SYS_RST_L is pseudo open drain. It is only an output when it's
+ * asserted.
+ */
+ return gpio_get_flags(GPIO_SYS_RST_L_OUT) & GPIO_OUTPUT;
}
/**
diff --git a/board/cr50/board.h b/board/cr50/board.h
index dd21473e36..535e34053b 100644
--- a/board/cr50/board.h
+++ b/board/cr50/board.h
@@ -38,6 +38,9 @@
#undef CONFIG_FLASH
#endif
+/* Enable getting gpio flags to tell if open drain pins are asserted */
+#define CONFIG_GPIO_GET_EXTENDED
+
/* Flash configuration */
#undef CONFIG_FLASH_PSTATE
#define CONFIG_WP_ALWAYS
diff --git a/board/cr50/gpio.inc b/board/cr50/gpio.inc
index 7a8fc11787..03015ba8b9 100644
--- a/board/cr50/gpio.inc
+++ b/board/cr50/gpio.inc
@@ -94,8 +94,11 @@ GPIO(INT_AP_L, PIN(0, 0), GPIO_OUT_HIGH)
GPIO(EC_FLASH_SELECT, PIN(0, 1), GPIO_OUT_LOW)
GPIO(AP_FLASH_SELECT, PIN(0, 2), GPIO_OUT_LOW)
-/* Pull this low to reset the AP. (We reset the EC with the RBOX.) */
-GPIO(SYS_RST_L_OUT, PIN(0, 4), GPIO_INPUT)
+/*
+ * Pull this low to reset the AP. (We reset the EC with the RBOX.)
+ * This is pseudo open drain.
+ */
+GPIO(SYS_RST_L_OUT, PIN(0, 4), GPIO_ODR_HIGH)
/*
* Indicate to EC when CCD is enabled. EC can pull this down too, to tell us if
@@ -171,10 +174,6 @@ PINMUX(GPIO(AP_FLASH_SELECT), B3, DIO_INPUT)
* removed.
*/
PINMUX(GPIO(EN_PP3300_INA_L), B7, DIO_INPUT)
-/*
- * To allow the EC to drive the signal we set sys_rst_l_out as an input here and
- * only change it to an output when we want to assert the signal.
- */
PINMUX(GPIO(SYS_RST_L_OUT), M0, DIO_INPUT)
PINMUX(GPIO(CCD_MODE_L), M1, DIO_INPUT)
PINMUX(GPIO(BATT_PRES_L), M2, 0)