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author | Vadim Bendebury <vbendeb@chromium.org> | 2019-06-04 09:01:42 -0700 |
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committer | Vadim Bendebury <vbendeb@chromium.org> | 2019-09-21 19:11:23 -0700 |
commit | fe9ae819615c80c2f75c831cf00fd1f241f4ee2e (patch) | |
tree | ff68fa2c6c6a47b583ebc0e443e74a274bb26cc3 | |
parent | 7080e6f07c5f2c61bd259181efc027e8d52ac483 (diff) | |
download | chrome-ec-fe9ae819615c80c2f75c831cf00fd1f241f4ee2e.tar.gz |
tpm: reset command_ready bit when entering idle state
TPM could enter idle state even when current command has not yet been
fully processed (for instance if the AP releases locality at an
arbitrary moment).
The status register command_ready bit needs to be unconditionally
reset when TPM enters idle state.
BRANCH=cr50, cr50-mp
BUG=none
TEST=verified reliable behavior during lengthy concurrent runs of
processes accessing TPM. The same type of testing was causing
occasional TPM lockups before this fix.
Change-Id: I6e1dc334713c666e4ef566d41bd0cbff841f1179
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1643828
Reviewed-by: Andrey Pronin <apronin@chromium.org>
(cherry picked from commit 5188d521f467f1933e925a4e45db770b8a75edaa)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1646885
(cherry picked from commit bc36efa60982482dc5b97e3188626658bb7a9ce1)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1705719
(cherry picked from commit 9e6eb51353d53e3fe3b01b5b285aa3ba81b55bba)
-rw-r--r-- | common/tpm_registers.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/common/tpm_registers.c b/common/tpm_registers.c index cf969875cd..9365a8de7a 100644 --- a/common/tpm_registers.c +++ b/common/tpm_registers.c @@ -187,9 +187,12 @@ static void set_tpm_state(enum tpm_states state) /* Make sure FIFO is empty. */ tpm_.fifo_read_index = 0; tpm_.fifo_write_index = 0; - tpm_.regs.sts &= ~data_avail; - /* Set burst size for the following write requests. */ - tpm_.regs.sts &= ~(burst_count_mask << burst_count_shift); + /* + * Set proper fields of the status register: FIFO depth 63, + * not ready, no data available. + */ + tpm_.regs.sts &= ~((burst_count_mask << burst_count_shift) | + command_ready | data_avail); tpm_.regs.sts |= 63 << burst_count_shift; } } @@ -283,7 +286,6 @@ static void sts_reg_write_cr(void) case tpm_state_executing_cmd: case tpm_state_receiving_cmd: set_tpm_state(tpm_state_idle); - tpm_.regs.sts &= ~command_ready; break; } } |