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| author | Tom Hughes <tomhughes@chromium.org> | 2021-09-28 21:59:00 +0000 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-10-13 22:07:19 +0000 |
| commit | ac7538a8f03d3b1bac14e54627ec92db05abcaeb (patch) | |
| tree | c07a06d07219d30b46b8fd5adcad6f5e96b588bc | |
| parent | b07054862df46efa462b224fb1f6e01091da9c95 (diff) | |
| download | chrome-ec-ac7538a8f03d3b1bac14e54627ec92db05abcaeb.tar.gz | |
core/cortex-m[0]: Work around clang inline-asm warning
clang warns that we're clobbering a reserved register:
inline asm clobber list contains reserved registers: R7
[-Werror,-Winline-asm].
According to
https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#Clobbers-and-Scratch-Registers:
When the compiler selects which registers to use to represent input and
output operands, it does not use any of the clobbered registers.
Before this change, the only remaining registers for the compiler to use
to hold the values represented by the symbolic names "pregs" and
"pstack" are R0 and R12. After this change, this still holds on clang,
since it won't clobber the reserved register R7 even if it's not on the
clobber list.
BRANCH=none
BUG=b:172020503
TEST=make V=1 CC=arm-none-eabi-clang BOARD=elm
TEST=./util/compare_build.sh -b all -j 120
=> MATCH
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I5182ef24f4465d68c97f4160a45cd479fe52e017
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3193273
Reviewed-by: Keith Short <keithshort@chromium.org>
| -rw-r--r-- | core/cortex-m/panic.c | 13 | ||||
| -rw-r--r-- | core/cortex-m0/panic.c | 13 |
2 files changed, 22 insertions, 4 deletions
diff --git a/core/cortex-m/panic.c b/core/cortex-m/panic.c index 248d27f0b7..fd80061b95 100644 --- a/core/cortex-m/panic.c +++ b/core/cortex-m/panic.c @@ -401,8 +401,17 @@ void exception_panic(void) [pstack] "r" (pstack_addr) : /* Constraints protecting these from being clobbered. * Gcc should be using r0 & r12 for pregs and pstack. */ - "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", - "r10", "r11", "cc", "memory" + "r1", "r2", "r3", "r4", "r5", "r6", + /* clang warns that we're clobbering a reserved register: + * inline asm clobber list contains reserved registers: R7 + * [-Werror,-Winline-asm]. The intent of the clobber list is + * to force pregs and pstack to be in R0 and R12, which + * still holds. + */ +#ifndef __clang__ + "r7", +#endif + "r8", "r9", "r10", "r11", "cc", "memory" ); } diff --git a/core/cortex-m0/panic.c b/core/cortex-m0/panic.c index 26447e4b7a..b0fa1f4e1d 100644 --- a/core/cortex-m0/panic.c +++ b/core/cortex-m0/panic.c @@ -163,8 +163,17 @@ void exception_panic(void) [pstack] "r" (pstack_addr) : /* Constraints protecting these from being clobbered. * Gcc should be using r0 & r12 for pregs and pstack. */ - "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", - "r10", "r11", "cc", "memory" + "r1", "r2", "r3", "r4", "r5", "r6", + /* clang warns that we're clobbering a reserved register: + * inline asm clobber list contains reserved registers: R7 + * [-Werror,-Winline-asm]. The intent of the clobber list is + * to force pregs and pstack to be in R0 and R12, which + * still holds. + */ +#ifndef __clang__ + "r7", +#endif + "r8", "r9", "r10", "r11", "cc", "memory" ); } |