diff options
author | Ruibin Chang <Ruibin.Chang@ite.com.tw> | 2021-06-07 16:44:57 +0800 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-07-05 04:58:27 +0000 |
commit | 3c8257a31ea4ab522e65721ad20f133e86d0c955 (patch) | |
tree | 748c7f5092a2e485cdce5316831bfa746ea92021 | |
parent | 4af47d62b4af78f951b0f8b29a1a116277b94c10 (diff) | |
download | chrome-ec-3c8257a31ea4ab522e65721ad20f133e86d0c955.tar.gz |
zephyr: enable PWM function
Enable PWM function on board it8xxx2_evb and hayato.
BUG=b:187189596
BRANCH=none
TEST=on it8xxx2_evb, check by oscilloscope:
1.PWM channel0 (GPA0) output frequency is same with setting 100Hz.
2.Setting PWM_POLARITY_INVERTED flag let waveform invert.
Cq-Depend: chromium:3001087
Change-Id: I7cbeb05550367b9bf346f3c85409d8259432144a
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2935650
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
7 files changed, 122 insertions, 0 deletions
diff --git a/zephyr/projects/asurada/boards/riscv/asurada/asurada_defconfig b/zephyr/projects/asurada/boards/riscv/asurada/asurada_defconfig index f05ded494c..c426c7f60a 100644 --- a/zephyr/projects/asurada/boards/riscv/asurada/asurada_defconfig +++ b/zephyr/projects/asurada/boards/riscv/asurada/asurada_defconfig @@ -73,6 +73,12 @@ CONFIG_PLATFORM_EC_POWERSEQ_PP5000_CONTROL=n CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK=y +# PWM +CONFIG_PWM=y +CONFIG_PWM_SHELL=n +CONFIG_PLATFORM_EC_PWM=y +CONFIG_PWM_ITE_IT8XXX2=y + # Serial Drivers CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y diff --git a/zephyr/projects/asurada/hayato/include/pwm_map.h b/zephyr/projects/asurada/hayato/include/pwm_map.h new file mode 100644 index 0000000000..0f74812827 --- /dev/null +++ b/zephyr/projects/asurada/hayato/include/pwm_map.h @@ -0,0 +1,23 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __ZEPHYR_CHROME_PWM_MAP_H +#define __ZEPHYR_CHROME_PWM_MAP_H + +#include <devicetree.h> + +#include "config.h" + +#include "pwm/pwm.h" + +/* + * TODO(b/177452529): eliminate the dependency on enum pwm_channel + * and configure this information directly from the device tree. + */ +#define PWM_CH_LED1 NAMED_PWM(led1) +#define PWM_CH_LED2 NAMED_PWM(led2) +#define PWM_CH_LED3 NAMED_PWM(led3) + +#endif /* __ZEPHYR_CHROME_PWM_MAP_H */ diff --git a/zephyr/projects/asurada/hayato/pwm.dts b/zephyr/projects/asurada/hayato/pwm.dts new file mode 100644 index 0000000000..fc8e0b169b --- /dev/null +++ b/zephyr/projects/asurada/hayato/pwm.dts @@ -0,0 +1,48 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + named-pwms { + compatible = "named-pwms"; + /* NOTE: &pwm number needs same with channel number */ + led1 { + pwms = <&pwm0 PWM_CHANNEL_0 PWM_POLARITY_INVERTED>; + label = "LED1"; + /* + * If we need pwm output in ITE chip power saving + * mode, then we should set frequency <=324Hz. + */ + frequency = <324>; + }; + led2 { + pwms = <&pwm1 PWM_CHANNEL_1 PWM_POLARITY_INVERTED>; + label = "LED2"; + frequency = <324>; + }; + led3 { + pwms = <&pwm2 PWM_CHANNEL_2 PWM_POLARITY_INVERTED>; + label = "LED3"; + frequency = <324>; + }; + }; +}; + +/* LED1 */ +&pwm0 { + status = "okay"; + prescaler-cx = <PWM_PRESCALER_C4>; +}; + +/* LED2 */ +&pwm1 { + status = "okay"; + prescaler-cx = <PWM_PRESCALER_C4>; +}; + +/* LED3 */ +&pwm2 { + status = "okay"; + prescaler-cx = <PWM_PRESCALER_C4>; +}; diff --git a/zephyr/projects/asurada/hayato/zmake.yaml b/zephyr/projects/asurada/hayato/zmake.yaml index cbe856ae4c..9e93580ead 100644 --- a/zephyr/projects/asurada/hayato/zmake.yaml +++ b/zephyr/projects/asurada/hayato/zmake.yaml @@ -7,6 +7,7 @@ dts-overlays: - battery.dts - gpio.dts - motionsense.dts + - pwm.dts supported-zephyr-versions: - v2.5 toolchain: coreboot-sdk diff --git a/zephyr/projects/it8xxx2_evb/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts b/zephyr/projects/it8xxx2_evb/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts index 5ebb3b2630..89ef56bc4c 100644 --- a/zephyr/projects/it8xxx2_evb/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts +++ b/zephyr/projects/it8xxx2_evb/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts @@ -180,6 +180,25 @@ label = "OPT_4"; }; }; + + named-pwms { + compatible = "named-pwms"; + /* NOTE: &pwm number needs same with channel number */ + test0 { + pwms = <&pwm7 PWM_CHANNEL_7 PWM_POLARITY_INVERTED>; + label = "TEST0"; + /* + * If we need pwm output in ITE chip power saving + * mode, then we should set frequency <=324Hz. + */ + frequency = <324>; + }; + test1 { + pwms = <&pwm0 PWM_CHANNEL_0 PWM_POLARITY_NORMAL>; + label = "TEST1"; + frequency = <30000>; + }; + }; }; &adc0 { @@ -211,3 +230,15 @@ current-speed = <115200>; clock-frequency = <1804800>; }; + +/* TEST1 */ +&pwm0 { + status = "okay"; + prescaler-cx = <PWM_PRESCALER_C6>; +}; + +/* TEST0 */ +&pwm7 { + status = "okay"; + prescaler-cx = <PWM_PRESCALER_C4>; +}; diff --git a/zephyr/projects/it8xxx2_evb/boards/riscv/it8xxx2_evb/it8xxx2_evb_defconfig b/zephyr/projects/it8xxx2_evb/boards/riscv/it8xxx2_evb/it8xxx2_evb_defconfig index 336c8a3726..915af78141 100644 --- a/zephyr/projects/it8xxx2_evb/boards/riscv/it8xxx2_evb/it8xxx2_evb_defconfig +++ b/zephyr/projects/it8xxx2_evb/boards/riscv/it8xxx2_evb/it8xxx2_evb_defconfig @@ -25,6 +25,12 @@ CONFIG_SHELL_HISTORY=y CONFIG_PINMUX=y CONFIG_PINMUX_ITE_IT8XXX2=y +# PWM +CONFIG_PWM=y +CONFIG_PWM_SHELL=n +CONFIG_PLATFORM_EC_PWM=y +CONFIG_PWM_ITE_IT8XXX2=y + # GPIO Controller CONFIG_GPIO=y CONFIG_GPIO_ITE_IT8XXX2=y diff --git a/zephyr/projects/it8xxx2_evb/include/pwm_map.h b/zephyr/projects/it8xxx2_evb/include/pwm_map.h index 5cf7377f52..531b86ccf6 100644 --- a/zephyr/projects/it8xxx2_evb/include/pwm_map.h +++ b/zephyr/projects/it8xxx2_evb/include/pwm_map.h @@ -12,4 +12,11 @@ #include "pwm/pwm.h" +/* + * TODO(b/177452529): eliminate the dependency on enum pwm_channel + * and configure this information directly from the device tree. + */ +#define PWM_CH_FAN NAMED_PWM(test0) +#define PWM_CH_WITH_DSLEEP_FLAG NAMED_PWM(test1) + #endif /* __ZEPHYR_CHROME_PWM_MAP_H */ |