zephyr: it8xxx2: Add the baseboard of it82202ax and it82202ax-512

Add the baseboard of it82202ax and it82202ax-512.

BRANCH=none
BUG=none
TEST=zmake build roach --clobber
TEST=Change zephyr_board(program/roach/BUILD.py) to
     the following chip variant:
zephyr_board="it82202ax" or zephyr_board="it82202ax-512"

Change-Id: I22980d1705dde081fde8805c545e3d82de77eb26
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4128256
Reviewed-by: Keith Short <keithshort@chromium.org>

5 files changed, 115 insertions, 1 deletions

diff --git a/zephyr/app/ec/chip/riscv/riscv-ite/Kconfig.it8xxx2 b/zephyr/app/ec/chip/riscv/riscv-ite/Kconfig.it8xxx2
index d559c8378c..5afcfe1db0 100644
--- a/zephyr/app/ec/chip/riscv/riscv-ite/Kconfig.it8xxx2
+++ b/zephyr/app/ec/chip/riscv/riscv-ite/Kconfig.it8xxx2
@@ -26,7 +26,7 @@ config CROS_EC_RO_MEM_OFF
 	default 0x0
 
 config CROS_EC_RW_MEM_OFF
-	default 0x60000
+	default $(dt_node_int_prop_hex,/binman/ec-rw,offset)
 
 config FLASH_LOAD_OFFSET
 	default CROS_EC_RW_MEM_OFF if CROS_EC_RW
diff --git a/zephyr/boards/riscv/it8xxx2/it82202ax-512.dts b/zephyr/boards/riscv/it8xxx2/it82202ax-512.dts
new file mode 100644
index 0000000000..73d3b8e3f3
--- /dev/null
+++ b/zephyr/boards/riscv/it8xxx2/it82202ax-512.dts
@@ -0,0 +1,35 @@
+/* Copyright 2023 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/dts-v1/;
+
+#include <ite/it82xx2.dtsi>
+#include <ite/it82202ax-512.dtsi>
+#include "it8xxx2.dts"
+
+/ {
+	/* it82xx2/512 has 512KB of flash. */
+	binman {
+		wp-ro {
+			offset = <0x0>;
+			size = <0x40000>;
+		};
+		ec-rw {
+			offset = <0x40000>;
+			size = <0x40000>;
+			rw-fw {
+				rw-fwid {
+					/* Fix the location of the FWID to the
+					 * last 32 bytes of the flash. This
+					 * ensures the RW entries in the FMAP
+					 * stored in the RO section of flash
+					 * are always correct.
+					 */
+					offset = <(0x40000 - 32)>;
+				};
+			};
+		};
+	};
+};
diff --git a/zephyr/boards/riscv/it8xxx2/it82202ax-512_defconfig b/zephyr/boards/riscv/it8xxx2/it82202ax-512_defconfig
new file mode 100644
index 0000000000..5750814a5a
--- /dev/null
+++ b/zephyr/boards/riscv/it8xxx2/it82202ax-512_defconfig
@@ -0,0 +1,35 @@
+# Copyright 2023 The ChromiumOS Authors
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+# Zephyr Kernel Configuration
+CONFIG_SOC_SERIES_RISCV32_IT8XXX2=y
+CONFIG_SOC_IT8XXX2=y
+CONFIG_SOC_IT82202_AX=y
+
+# Platform Configuration
+CONFIG_BOARD_IT8XXX2=y
+
+# Power Management
+CONFIG_PM=y
+CONFIG_PM_DEVICE=y
+CONFIG_PM_POLICY_CUSTOM=y
+
+# Console
+CONFIG_CONSOLE=y
+
+# GPIO Controller
+CONFIG_GPIO=y
+CONFIG_GPIO_GET_CONFIG=y
+
+# Clock Controller
+CONFIG_CLOCK_CONTROL=n
+
+# Serial Drivers
+CONFIG_SERIAL=y
+
+# WATCHDOG configuration
+CONFIG_WATCHDOG=y
+
+# BBRAM
+CONFIG_BBRAM=y
diff --git a/zephyr/boards/riscv/it8xxx2/it82202ax.dts b/zephyr/boards/riscv/it8xxx2/it82202ax.dts
new file mode 100644
index 0000000000..b6ed731405
--- /dev/null
+++ b/zephyr/boards/riscv/it8xxx2/it82202ax.dts
@@ -0,0 +1,9 @@
+/* Copyright 2023 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/dts-v1/;
+
+#include <ite/it82xx2.dtsi>
+#include "it8xxx2.dts"
diff --git a/zephyr/boards/riscv/it8xxx2/it82202ax_defconfig b/zephyr/boards/riscv/it8xxx2/it82202ax_defconfig
new file mode 100644
index 0000000000..5750814a5a
--- /dev/null
+++ b/zephyr/boards/riscv/it8xxx2/it82202ax_defconfig
@@ -0,0 +1,35 @@
+# Copyright 2023 The ChromiumOS Authors
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+# Zephyr Kernel Configuration
+CONFIG_SOC_SERIES_RISCV32_IT8XXX2=y
+CONFIG_SOC_IT8XXX2=y
+CONFIG_SOC_IT82202_AX=y
+
+# Platform Configuration
+CONFIG_BOARD_IT8XXX2=y
+
+# Power Management
+CONFIG_PM=y
+CONFIG_PM_DEVICE=y
+CONFIG_PM_POLICY_CUSTOM=y
+
+# Console
+CONFIG_CONSOLE=y
+
+# GPIO Controller
+CONFIG_GPIO=y
+CONFIG_GPIO_GET_CONFIG=y
+
+# Clock Controller
+CONFIG_CLOCK_CONTROL=n
+
+# Serial Drivers
+CONFIG_SERIAL=y
+
+# WATCHDOG configuration
+CONFIG_WATCHDOG=y
+
+# BBRAM
+CONFIG_BBRAM=y