Frostflow : Initial BOARD

This patch initial Frostflow board base on Skyrim.

LOW_COVERAGE_REASON=New device specific configuration
BUG=b:246870960
BRANCH=none
TEST=zmake build frostflow success.

Change-Id: Ic4ca453a74dec4bbd390e856844ced5c02991775
Signed-off-by: Logan_Liao <logan_Liao@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3915744
Commit-Queue: Bob Moragues <moragues@chromium.org>
Tested-by: Bob Moragues <moragues@chromium.org>
Code-Coverage: Bob Moragues <moragues@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Logan Liao <logan_liao@compal.corp-partner.google.com>

13 files changed, 728 insertions, 0 deletions

diff --git a/zephyr/projects/skyrim/BUILD.py b/zephyr/projects/skyrim/BUILD.py
index ff53aeefda..3807150af9 100644
--- a/zephyr/projects/skyrim/BUILD.py
+++ b/zephyr/projects/skyrim/BUILD.py
@@ -70,3 +70,17 @@ register_skyrim_project(
         here / "prj_winterhold.conf",
     ],
 )
+
+
+register_skyrim_project(
+    project_name="frostflow",
+    extra_dts_overlays=[
+        here / "frostflow.dts",
+        here / "battery_frostflow.dts",
+        here / "led_pins_frostflow.dts",
+        here / "led_policy_frostflow.dts",
+    ],
+    extra_kconfig_files=[
+        here / "prj_frostflow.conf",
+    ],
+)
diff --git a/zephyr/projects/skyrim/CMakeLists.txt b/zephyr/projects/skyrim/CMakeLists.txt
index 30817348ed..f4cdef5ec3 100644
--- a/zephyr/projects/skyrim/CMakeLists.txt
+++ b/zephyr/projects/skyrim/CMakeLists.txt
@@ -45,3 +45,15 @@ if(DEFINED CONFIG_BOARD_WINTERHOLD)
 		"src/winterhold/kb_backlight.c"
     )
 endif()
+
+if(DEFINED CONFIG_BOARD_FROSTFLOW)
+	project(frostflow)
+	cros_ec_library_include_directories_ifdef(CONFIG_BOARD_FROSTFLOW include)
+	zephyr_library_sources(
+			"src/frostflow/usb_mux_config.c"
+			"src/frostflow/ppc_config.c"
+			"src/frostflow/form_factor.c"
+			"src/frostflow/alt_charger.c"
+	)
+	zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_FAN "src/frostflow/fan.c")
+endif()
diff --git a/zephyr/projects/skyrim/Kconfig b/zephyr/projects/skyrim/Kconfig
index d2ef60fa52..e53fa1e350 100644
--- a/zephyr/projects/skyrim/Kconfig
+++ b/zephyr/projects/skyrim/Kconfig
@@ -20,6 +20,12 @@ config BOARD_WINTERHOLD
 	  Build Google Winterhold reference board.  This board uses an AMD SoC
 	  and NPCX9 EC
 
+config BOARD_FROSTFLOW
+	bool "Google Frostflow Board"
+	help
+	  Build Google Frostflow reference board.  This board uses an AMD SoC
+	  and NPCX9 EC
+
 module = SKYRIM
 module-str = Skyrim board-specific code
 source "subsys/logging/Kconfig.template.log_config"
diff --git a/zephyr/projects/skyrim/battery_frostflow.dts b/zephyr/projects/skyrim/battery_frostflow.dts
new file mode 100644
index 0000000000..6b1799c233
--- /dev/null
+++ b/zephyr/projects/skyrim/battery_frostflow.dts
@@ -0,0 +1,15 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/ {
+	batteries {
+		default_battery: aec_5477109 {
+			compatible = "aec,5477109", "battery-smart";
+		};
+		smp_l20m3pg1 {
+			compatible = "smp,l20m3pg1", "battery-smart";
+		};
+	};
+};
diff --git a/zephyr/projects/skyrim/frostflow.dts b/zephyr/projects/skyrim/frostflow.dts
new file mode 100644
index 0000000000..b784f04524
--- /dev/null
+++ b/zephyr/projects/skyrim/frostflow.dts
@@ -0,0 +1,191 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include <dt-bindings/usbc_mux.h>
+
+#include "i2c_common.dtsi"
+
+/ {
+	named-gpios {
+		/* Frostflow-specific GPIO customizations */
+	};
+
+	named-temp-sensors {
+		compatible = "cros-ec,temp-sensors";
+		soc-pct2075 {
+			temp_host_high = <100>;
+			temp_host_halt = <105>;
+			temp_host_release_high = <80>;
+			temp_host_release_halt = <80>;
+			temp_fan_off = <35>;
+			temp_fan_max = <70>;
+			power-good-pin = <&gpio_pg_pwr_s5>;
+			sensor = <&soc_pct2075>;
+		};
+		amb-pct2075 {
+			power-good-pin = <&gpio_pg_pwr_s5>;
+			sensor = <&amb_pct2075>;
+		};
+	};
+
+	/*
+	 * Note this is expected to vary per-board, so we keep it in the board
+	 * dts files.
+	 */
+	frostflow-fw-config {
+		compatible = "cros-ec,cbi-fw-config";
+
+		form-factor {
+			enum-name = "FW_FORM_FACTOR";
+			start = <0>;
+			size = <1>;
+
+			ff-clamshell {
+				compatible = "cros-ec,cbi-fw-config-value";
+				enum-name = "FW_FF_CLAMSHELL";
+				value = <0>;
+			};
+			ff-convertible {
+				compatible = "cros-ec,cbi-fw-config-value";
+				enum-name = "FW_FF_CONVERTIBLE";
+				value = <1>;
+				default;
+			};
+		};
+		io-db {
+			enum-name = "FW_IO_DB";
+			start = <6>;
+			size = <2>;
+
+			io-db-ps8811-ps8818 {
+				compatible = "cros-ec,cbi-fw-config-value";
+				enum-name = "FW_IO_DB_PS8811_PS8818";
+				value = <0>;
+			};
+		};
+
+		/*
+		 * FW_CONFIG field to enable fan or not.
+		 */
+		fan {
+			enum-name = "FW_FAN";
+			start = <10>;
+			size = <1>;
+
+			no-fan {
+				compatible = "cros-ec,cbi-fw-config-value";
+				enum-name = "FW_FAN_NOT_PRESENT";
+				value = <0>;
+			};
+			fan-present {
+				compatible = "cros-ec,cbi-fw-config-value";
+				enum-name = "FW_FAN_PRESENT";
+				value = <1>;
+				/*
+				 * Set as default so that unprovisioned
+				 * configs will run the fan regardless.
+				 */
+				default;
+			};
+		};
+
+		charger-option {
+			enum-name = "FW_CHARGER";
+			start = <11>;
+			size = <2>;
+
+			charger-option-isl9241 {
+				compatible = "cros-ec,cbi-fw-config-value";
+				enum-name = "FW_CHARGER_ISL9241";
+				value = <0>;
+				default;
+			};
+		};
+	};
+
+	/* Rotation matrices for motion sensors. */
+	motionsense-rotation-ref {
+		compatible = "cros-ec,motionsense-rotation-ref";
+		lid_rot_ref: lid-rotation-ref {
+			mat33 = <0 (-1) 0
+				 1 0 0
+				 0 0 1>;
+		};
+
+		lid_rot_ref1: lid-rotation-ref1 {
+			mat33 = <0 1 0
+				 (-1) 0 0
+				 0 0 1>;
+		};
+
+		base_rot_ref: base-rotation-ref {
+			mat33 = <0 1 0
+				 (-1) 0 0
+				 0 0 1>;
+		};
+	};
+
+	ppc_port0: aoz1380 {
+		compatible = "aoz,aoz1380";
+		status = "okay";
+	};
+};
+
+&i2c0_0 {
+	anx7483_port0: anx7483@3e {
+		compatible = "analogix,anx7483";
+		reg = <0x3e>;
+		board-set = "board_anx7483_c0_mux_set";
+	};
+};
+
+&i2c1_0 {
+	anx7483_port1: anx7483@3e {
+		compatible = "analogix,anx7483";
+		reg = <0x3e>;
+		board-set = "board_anx7483_c1_mux_set";
+	};
+	ppc_port1: nx20p348x@71 {
+		compatible = "nxp,nx20p348x";
+		status = "okay";
+		reg = <0x71>;
+	};
+	ps8818_port1: ps8818@28 {
+		compatible = "parade,ps8818";
+		reg = <0x28>;
+		flags = <(USB_MUX_FLAG_RESETS_IN_G3)>;
+		board-set = "board_c1_ps8818_mux_set";
+	};
+};
+
+&i2c4_1 {
+	alt_charger: isl9538@9 {
+		compatible = "intersil,isl923x";
+		status = "okay";
+		reg = <0x9>;
+	};
+};
+
+&usbc_port0 {
+	chg_alt = <&alt_charger>;
+	ppc = <&ppc_port0>;
+	usb-mux-chain-0 {
+		compatible = "cros-ec,usb-mux-chain";
+		usb-muxes = <&amd_fp6_port0 &anx7483_port0>;
+	};
+};
+
+&usbc_port1 {
+	ppc = <&ppc_port1>;
+	usb-mux-chain-1-anx {
+		compatible = "cros-ec,usb-mux-chain";
+		usb-muxes = <&amd_fp6_port1 &anx7483_port1>;
+	};
+	usb_mux_chain_ps8818_port1: usb-mux-chain-1-ps {
+		compatible = "cros-ec,usb-mux-chain";
+		usb-muxes = <&amd_fp6_port1 &ps8818_port1>;
+		alternative-chain;
+	};
+};
diff --git a/zephyr/projects/skyrim/led_pins_frostflow.dts b/zephyr/projects/skyrim/led_pins_frostflow.dts
new file mode 100644
index 0000000000..33a66c0756
--- /dev/null
+++ b/zephyr/projects/skyrim/led_pins_frostflow.dts
@@ -0,0 +1,63 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/ {
+	pwm_pins {
+		compatible = "cros-ec,pwm-pin-config";
+
+		pwm_y: pwm_y {
+			#led-pin-cells = <1>;
+			pwms = <&pwm2 0 PWM_HZ(100) PWM_POLARITY_INVERTED>;
+		};
+
+		pwm_w: pwm_w {
+			#led-pin-cells = <1>;
+			pwms = <&pwm3 0 PWM_HZ(100) PWM_POLARITY_INVERTED>;
+		};
+	};
+
+	pwm-led-pins {
+		compatible = "cros-ec,pwm-led-pins";
+
+		color_off: color-off {
+			led-color = "LED_OFF";
+			led-id = "EC_LED_ID_BATTERY_LED";
+			led-pins = <&pwm_y 0>,
+				   <&pwm_w 0>;
+		};
+
+		color_amber: color-amber {
+			led-color = "LED_AMBER";
+			led-id = "EC_LED_ID_BATTERY_LED";
+			br-color = "EC_LED_COLOR_AMBER";
+			led-pins = <&pwm_y 100>,
+				   <&pwm_w 0>;
+		};
+
+		color_white: color-white {
+			led-color = "LED_WHITE";
+			led-id = "EC_LED_ID_BATTERY_LED";
+			br-color = "EC_LED_COLOR_BLUE";
+			led-pins = <&pwm_y 0>,
+				   <&pwm_w 100>;
+		};
+	};
+};
+
+/* Amber "battery charging" LED */
+&pwm2 {
+	status = "okay";
+	clock-bus = "NPCX_CLOCK_BUS_LFCLK";
+	pinctrl-0 = <&pwm2_gpc4>;
+	pinctrl-names = "default";
+};
+
+/* White "battery full" LED */
+&pwm3 {
+	status = "okay";
+	clock-bus = "NPCX_CLOCK_BUS_LFCLK";
+	pinctrl-0 = <&pwm3_gp80>;
+	pinctrl-names = "default";
+};
diff --git a/zephyr/projects/skyrim/led_policy_frostflow.dts b/zephyr/projects/skyrim/led_policy_frostflow.dts
new file mode 100644
index 0000000000..a075c6b0d2
--- /dev/null
+++ b/zephyr/projects/skyrim/led_policy_frostflow.dts
@@ -0,0 +1,103 @@
+#include <dt-bindings/battery.h>
+
+/ {
+	led-colors {
+		compatible = "cros-ec,led-policy";
+
+		power-state-charge {
+			charge-state = "PWR_STATE_CHARGE";
+
+			color-0 {
+				led-color = <&color_amber>;
+			};
+		};
+
+		power-state-discharge-s0 {
+			charge-state = "PWR_STATE_DISCHARGE";
+			chipset-state = "POWER_S0";
+			/* Battery percent range (> Low, <= Full) */
+			batt-lvl = <(BATTERY_LEVEL_LOW + 1) BATTERY_LEVEL_FULL>;
+
+			color-0 {
+				led-color = <&color_white>;
+			};
+		};
+
+		power-state-discharge-s0-batt-low {
+			charge-state = "PWR_STATE_DISCHARGE";
+			chipset-state = "POWER_S0";
+			/* Battery percent range (>= Empty, <= Low) */
+			batt-lvl = <BATTERY_LEVEL_EMPTY BATTERY_LEVEL_LOW>;
+
+			/* White 2 sec, off 1 sec */
+			color-0 {
+				led-color = <&color_white>;
+				period-ms = <2000>;
+			};
+			color-1 {
+				led-color = <&color_off>;
+				period-ms = <1000>;
+			};
+		};
+
+		power-state-discharge-s3 {
+			charge-state = "PWR_STATE_DISCHARGE";
+			chipset-state = "POWER_S3";
+
+			/* White 1 sec, off 1 sec */
+			color-0 {
+				led-color = <&color_white>;
+				period-ms = <1000>;
+			};
+			color-1 {
+				led-color = <&color_off>;
+				period-ms = <1000>;
+			};
+		};
+
+		power-state-discharge-s5 {
+			charge-state = "PWR_STATE_DISCHARGE";
+			chipset-state = "POWER_S5";
+
+			color-0 {
+				led-color = <&color_off>;
+			};
+		};
+
+		power-state-error {
+			charge-state = "PWR_STATE_ERROR";
+
+			/* Amber 1 sec, off 1 sec */
+			color-0 {
+				led-color = <&color_amber>;
+				period-ms = <1000>;
+			};
+			color-1 {
+				led-color = <&color_off>;
+				period-ms = <1000>;
+			};
+		};
+
+		power-state-near-full {
+			charge-state = "PWR_STATE_CHARGE_NEAR_FULL";
+
+			color-0 {
+				led-color = <&color_white>;
+			};
+		};
+
+		power-state-forced-idle {
+			charge-state = "PWR_STATE_FORCED_IDLE";
+
+			/* Amber 2 sec, White 2 sec */
+			color-0 {
+				led-color = <&color_amber>;
+				period-ms = <2000>;
+			};
+			color-1 {
+				led-color = <&color_white>;
+				period-ms = <2000>;
+			};
+		};
+	};
+};
diff --git a/zephyr/projects/skyrim/prj_frostflow.conf b/zephyr/projects/skyrim/prj_frostflow.conf
new file mode 100644
index 0000000000..798285cc9f
--- /dev/null
+++ b/zephyr/projects/skyrim/prj_frostflow.conf
@@ -0,0 +1,27 @@
+# Copyright 2022 The ChromiumOS Authors
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+# Frostflow reference-board-specific Kconfig settings.
+CONFIG_BOARD_FROSTFLOW=y
+
+# TODO(b/215404321): Remove later in board development
+CONFIG_PLATFORM_EC_EEPROM_CBI_WP=y
+CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED=y
+
+# LED
+CONFIG_PLATFORM_EC_LED_DT=y
+
+# Frostflow is capable of sinking 100W
+CONFIG_PLATFORM_EC_PD_MAX_POWER_MW=45000
+CONFIG_PLATFORM_EC_PD_MAX_CURRENT_MA=3000
+CONFIG_PLATFORM_EC_PD_MAX_VOLTAGE_MV=20000
+CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON=15000
+# Only Frostflow has the PCT2075
+CONFIG_PLATFORM_EC_TEMP_SENSOR_PCT2075=y
+
+CONFIG_PLATFORM_EC_USBC_RETIMER_ANX7483=y
+
+# Enable alternative charger chip
+CONFIG_PLATFORM_EC_CHARGER_RUNTIME_CONFIG=y
+CONFIG_PLATFORM_EC_CHARGER_ISL9238C=y
diff --git a/zephyr/projects/skyrim/src/frostflow/alt_charger.c b/zephyr/projects/skyrim/src/frostflow/alt_charger.c
new file mode 100644
index 0000000000..76b26d32bc
--- /dev/null
+++ b/zephyr/projects/skyrim/src/frostflow/alt_charger.c
@@ -0,0 +1,28 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include <zephyr/devicetree.h>
+#include <zephyr/logging/log.h>
+
+#include "charger_chips.h"
+#include "common.h"
+#include "cros_board_info.h"
+#include "cros_cbi.h"
+#include "hooks.h"
+
+LOG_MODULE_DECLARE(frostflow, CONFIG_SKYRIM_LOG_LEVEL);
+
+static void alt_charger_init(void)
+{
+	int ret;
+	uint32_t val;
+
+	ret = cros_cbi_get_fw_config(FW_CHARGER, &val);
+	if (ret != 0) {
+		LOG_ERR("Error retrieving CBI FW_CONFIG field %d", FW_CHARGER);
+		return;
+	}
+}
+DECLARE_HOOK(HOOK_INIT, alt_charger_init, HOOK_PRIO_POST_FIRST);
diff --git a/zephyr/projects/skyrim/src/frostflow/fan.c b/zephyr/projects/skyrim/src/frostflow/fan.c
new file mode 100644
index 0000000000..5df2639208
--- /dev/null
+++ b/zephyr/projects/skyrim/src/frostflow/fan.c
@@ -0,0 +1,46 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include <zephyr/devicetree.h>
+#include <zephyr/drivers/gpio.h>
+#include <zephyr/logging/log.h>
+
+#include "cros_board_info.h"
+#include "cros_cbi.h"
+#include "fan.h"
+#include "gpio/gpio.h"
+#include "hooks.h"
+
+LOG_MODULE_DECLARE(frostflow, CONFIG_SKYRIM_LOG_LEVEL);
+
+/*
+ * Frostflow fan support
+ */
+static void fan_init(void)
+{
+	int ret;
+	uint32_t val;
+	uint32_t board_version;
+	/*
+	 * Retrieve the fan config.
+	 */
+	ret = cros_cbi_get_fw_config(FW_FAN, &val);
+	if (ret != 0) {
+		LOG_ERR("Error retrieving CBI FW_CONFIG field %d", FW_FAN);
+		return;
+	}
+
+	ret = cbi_get_board_version(&board_version);
+	if (ret != EC_SUCCESS) {
+		LOG_ERR("Error retrieving CBI board version");
+		return;
+	}
+
+	if ((board_version >= 3) && (val != FW_FAN_PRESENT)) {
+		/* Disable the fan */
+		fan_set_count(0);
+	}
+}
+DECLARE_HOOK(HOOK_INIT, fan_init, HOOK_PRIO_POST_FIRST);
diff --git a/zephyr/projects/skyrim/src/frostflow/form_factor.c b/zephyr/projects/skyrim/src/frostflow/form_factor.c
new file mode 100644
index 0000000000..bc0a0c5cd2
--- /dev/null
+++ b/zephyr/projects/skyrim/src/frostflow/form_factor.c
@@ -0,0 +1,37 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include <zephyr/devicetree.h>
+#include <zephyr/logging/log.h>
+#include "common.h"
+#include "accelgyro.h"
+#include "cros_board_info.h"
+#include "hooks.h"
+#include "motionsense_sensors.h"
+
+LOG_MODULE_DECLARE(frostflow, CONFIG_SKYRIM_LOG_LEVEL);
+
+/*
+ * Mainboard orientation support.
+ */
+
+#define ALT_MAT SENSOR_ROT_STD_REF_NAME(DT_NODELABEL(lid_rot_ref1))
+#define LID_ACCEL SENSOR_ID(DT_NODELABEL(lid_accel))
+
+static void form_factor_init(void)
+{
+	int ret;
+	uint32_t val;
+	/*
+	 * If the board version >=4
+	 * use ver1 rotation matrix.
+	 */
+	ret = cbi_get_board_version(&val);
+	if (ret == EC_SUCCESS && val >= 4) {
+		LOG_INF("Switching to ver1 lid");
+		motion_sensors[LID_ACCEL].rot_standard_ref = &ALT_MAT;
+	}
+}
+DECLARE_HOOK(HOOK_INIT, form_factor_init, HOOK_PRIO_POST_I2C);
diff --git a/zephyr/projects/skyrim/src/frostflow/ppc_config.c b/zephyr/projects/skyrim/src/frostflow/ppc_config.c
new file mode 100644
index 0000000000..6072a788eb
--- /dev/null
+++ b/zephyr/projects/skyrim/src/frostflow/ppc_config.c
@@ -0,0 +1,46 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Frostflow board-specific PPC code */
+
+#include <zephyr/drivers/gpio.h>
+
+#include "driver/ppc/nx20p348x.h"
+#include "driver/ppc/aoz1380_public.h"
+#include "usbc_ppc.h"
+
+#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args)
+#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ##args)
+
+/*
+ * In the AOZ1380 PPC, there are no programmable features.  We use
+ * the attached NCT3807 to control a GPIO to indicate 1A5 or 3A0
+ * current limits.
+ */
+int board_aoz1380_set_vbus_source_current_limit(int port, enum tcpc_rp_value rp)
+{
+	int rv = EC_SUCCESS;
+
+	rv = gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(ioex_usb_c0_ilim_3a_en),
+			     (rp == TYPEC_RP_3A0) ? 1 : 0);
+
+	return rv;
+}
+
+void ppc_interrupt(enum gpio_signal signal)
+{
+	switch (signal) {
+	case GPIO_USB_C0_PPC_INT_ODL:
+		aoz1380_interrupt(0);
+		break;
+
+	case GPIO_USB_C1_PPC_INT_ODL:
+		nx20p348x_interrupt(1);
+		break;
+
+	default:
+		break;
+	}
+}
diff --git a/zephyr/projects/skyrim/src/frostflow/usb_mux_config.c b/zephyr/projects/skyrim/src/frostflow/usb_mux_config.c
new file mode 100644
index 0000000000..58111e66ec
--- /dev/null
+++ b/zephyr/projects/skyrim/src/frostflow/usb_mux_config.c
@@ -0,0 +1,140 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Frostflow board-specific USB-C mux configuration */
+
+#include <zephyr/drivers/gpio.h>
+
+#include "console.h"
+#include "cros_board_info.h"
+#include "cros_cbi.h"
+#include "driver/retimer/anx7483_public.h"
+#include "hooks.h"
+#include "ioexpander.h"
+#include "usb_mux.h"
+#include "usbc/usb_muxes.h"
+
+#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args)
+#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ##args)
+
+/*
+ * USB C0 (general) and C1 (just ANX DB) use IOEX pins to
+ * indicate flipped polarity to a protection switch.
+ */
+static int ioex_set_flip(int port, mux_state_t mux_state)
+{
+	if (port == 0) {
+		if (mux_state & USB_PD_MUX_POLARITY_INVERTED)
+			gpio_pin_set_dt(
+				GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip),
+				1);
+		else
+			gpio_pin_set_dt(
+				GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip),
+				0);
+	} else {
+		if (mux_state & USB_PD_MUX_POLARITY_INVERTED)
+			gpio_pin_set_dt(
+				GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip),
+				1);
+		else
+			gpio_pin_set_dt(
+				GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip),
+				0);
+	}
+
+	return EC_SUCCESS;
+}
+
+int board_anx7483_c0_mux_set(const struct usb_mux *me, mux_state_t mux_state)
+{
+	/* Set the SBU polarity mux */
+	RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state));
+
+	return anx7483_set_default_tuning(me, mux_state);
+}
+
+int board_anx7483_c1_mux_set(const struct usb_mux *me, mux_state_t mux_state)
+{
+	bool flipped = mux_state & USB_PD_MUX_POLARITY_INVERTED;
+
+	/* Set the SBU polarity mux */
+	RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state));
+
+	/* Remove flipped from the state for easier compraisons */
+	mux_state = mux_state & ~USB_PD_MUX_POLARITY_INVERTED;
+
+	RETURN_ERROR(anx7483_set_default_tuning(me, mux_state));
+
+	if (mux_state == USB_PD_MUX_USB_ENABLED) {
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+	} else if (mux_state == USB_PD_MUX_DP_ENABLED) {
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+	} else if (mux_state == USB_PD_MUX_DOCK && !flipped) {
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+	} else if (mux_state == USB_PD_MUX_DOCK && flipped) {
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+	}
+
+	return EC_SUCCESS;
+}
+
+int board_c1_ps8818_mux_set(const struct usb_mux *me, mux_state_t mux_state)
+{
+	CPRINTSUSB("C1: PS8818 mux using default tuning");
+
+	/* Once a DP connection is established, we need to set IN_HPD */
+	if (mux_state & USB_PD_MUX_DP_ENABLED)
+		ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 1);
+	else
+		ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 0);
+
+	return 0;
+}
+
+static void setup_mux(void)
+{
+	uint32_t val;
+
+	if (cros_cbi_get_fw_config(FW_IO_DB, &val) != 0)
+		CPRINTSUSB("Error finding FW_DB_IO in CBI FW_CONFIG");
+	/* Val will have our dts default on error, so continue setup */
+
+	if (val == FW_IO_DB_PS8811_PS8818) {
+		CPRINTSUSB("C1: Setting PS8818 mux");
+		USB_MUX_ENABLE_ALTERNATIVE(usb_mux_chain_ps8818_port1);
+	} else {
+		CPRINTSUSB("Unexpected DB_IO board: %d", val);
+	}
+}
+DECLARE_HOOK(HOOK_INIT, setup_mux, HOOK_PRIO_INIT_I2C);