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author | Shawn Nematbakhsh <shawnn@chromium.org> | 2016-01-15 16:48:40 -0800 |
---|---|---|
committer | ChromeOS bot <3su6n15k.default@developer.gserviceaccount.com> | 2016-01-19 20:23:00 +0000 |
commit | 90537cc88beae51d595a196c984c61dccf96e56c (patch) | |
tree | e841a0fce65264d72a50a6bfcc4353b4d3d8110f | |
parent | 3e16869227884e5f69f1594ee9973eda94669979 (diff) | |
download | chrome-ec-90537cc88beae51d595a196c984c61dccf96e56c.tar.gz |
mec1322: lpc: Clear STATUS_PROCESSING LPC status bit on init
When a sysjump host command is received, there is a (usually) small
period of time when the EC has sent a reply packet back to the host, but
interrupts are still enabled. If the host sends a new host command,
STATUS_PROCESSING will be set by the EC ISR, but the host command will
never be handled due to pending sysjump. In this case, STATUS_PROCESSING
will still be set, so we need to clear it on LPC post-sysjump re-init.
BUG=chrome-os-partner:49318
TEST=Add 200ms msleep before call to interrupt_disable() in
jump_to_image(), boot to software sync, and verify host commands are
handled successfully post-sysjump and system continues to boot.
BRANCH=glados, cyan
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Id0878df738541f7d5d158821a68988a8e6dc6759
Reviewed-on: https://chromium-review.googlesource.com/322058
Commit-Queue: BoChao Jhan <james_chao@asus.com>
Tested-by: BoChao Jhan <james_chao@asus.com>
-rw-r--r-- | chip/mec1322/lpc.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/chip/mec1322/lpc.c b/chip/mec1322/lpc.c index c486f75e77..915743fc67 100644 --- a/chip/mec1322/lpc.c +++ b/chip/mec1322/lpc.c @@ -229,12 +229,15 @@ static void setup_lpc(void) MEC1322_LPC_ACPI_EC0_BAR = 0x00628304; MEC1322_INT_ENABLE(15) |= 1 << 6; MEC1322_INT_BLK_EN |= 1 << 15; + /* Clear STATUS_PROCESSING bit in case it was set during sysjump */ + MEC1322_ACPI_EC_STATUS(0) &= ~EC_LPC_STATUS_PROCESSING; task_enable_irq(MEC1322_IRQ_ACPIEC0_IBF); /* Set up ACPI1 for 0x200/0x204 */ MEC1322_LPC_ACPI_EC1_BAR = 0x02008407; MEC1322_INT_ENABLE(15) |= 1 << 8; MEC1322_INT_BLK_EN |= 1 << 15; + MEC1322_ACPI_EC_STATUS(1) &= ~EC_LPC_STATUS_PROCESSING; task_enable_irq(MEC1322_IRQ_ACPIEC1_IBF); /* Set up 8042 interface at 0x60/0x64 */ |