Revert "lpc: Add and use lpc_resume_clear_masks"

This reverts commit dbbb19c051be37ef8b1d8aed0674fb5dfd73345b.

Reason for revert: Re-using 32-bit host events instead.  See b/110292722

Original change's description:
> lpc: Add and use lpc_resume_clear_masks
> 
> Add a new LPC helper routine lpc_resume_clear_masks that can be used
> to clear SCI, SMI and wake masks upon resume from S3. This is done to
> mask the events until host explicitly unmasks them.
> 
> It also ensures that these masks do not get reset on resume from S0ix
> where the host does not re-configure these masks.
> 
> BUG=b:68669668
> BRANCH=None
> TEST=Verified following:
> 1. make -j buildall
> 2. On resume from S0ix, SCI mask is not reset.
> 3. On resume from S3, SCI mask is reset and then set again by host request.
> 
> Change-Id: I32db77d81e2ddf046edb1ef74852c5ac50075b8f
> Signed-off-by: Furquan Shaikh <furquan@chromium.org>
> Reviewed-on: https://chromium-review.googlesource.com/745533
> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
> (cherry picked from commit 7d66541b462a5b86ab051ce1a4ad5404496a991c)
> Reviewed-on: https://chromium-review.googlesource.com/989866
> Reviewed-by: Joel Kitching <kitching@chromium.org>
> Commit-Queue: Joel Kitching <kitching@chromium.org>
> Tested-by: Joel Kitching <kitching@chromium.org>
> Trybot-Ready: Joel Kitching <kitching@chromium.org>

Bug: b:68669668
Change-Id: I75c3c2d0c3a97f57871200587ad1164a45cb18fb
Reviewed-on: https://chromium-review.googlesource.com/1113784
Reviewed-by: Joel Kitching <kitching@chromium.org>
Commit-Queue: Joel Kitching <kitching@chromium.org>
Tested-by: Joel Kitching <kitching@chromium.org>
Trybot-Ready: Joel Kitching <kitching@chromium.org>

7 files changed, 34 insertions, 15 deletions

diff --git a/chip/it83xx/lpc.c b/chip/it83xx/lpc.c
index c860a372b9..71ce9fa16b 100644
--- a/chip/it83xx/lpc.c
+++ b/chip/it83xx/lpc.c
@@ -720,6 +720,16 @@ void lpc_disable_acpi_interrupts(void)
 
 static void lpc_resume(void)
 {
+#ifdef CONFIG_POWER_S0IX
+	if (chipset_in_state(CHIPSET_STATE_SUSPEND | CHIPSET_STATE_ON))
+#endif
+	{
+		/* Mask all host events until the host unmasks them itself.  */
+		lpc_set_host_event_mask(LPC_HOST_EVENT_SMI, 0);
+		lpc_set_host_event_mask(LPC_HOST_EVENT_SCI, 0);
+		lpc_set_host_event_mask(LPC_HOST_EVENT_WAKE, 0);
+	}
+
 	/* Store port 80 event so we know where resume happened */
 	port_80_write(PORT_80_EVENT_RESUME);
 }
diff --git a/chip/lm4/lpc.c b/chip/lm4/lpc.c
index 91c4959862..c374fb686e 100644
--- a/chip/lm4/lpc.c
+++ b/chip/lm4/lpc.c
@@ -803,6 +803,11 @@ DECLARE_HOOK(HOOK_INIT, lpc_init, HOOK_PRIO_INIT_LPC);
 
 static void lpc_resume(void)
 {
+	/* Mask all host events until the host unmasks them itself.  */
+	lpc_set_host_event_mask(LPC_HOST_EVENT_SMI, 0);
+	lpc_set_host_event_mask(LPC_HOST_EVENT_SCI, 0);
+	lpc_set_host_event_mask(LPC_HOST_EVENT_WAKE, 0);
+
 	/* Store port 80 event so we know where resume happened */
 	port_80_write(PORT_80_EVENT_RESUME);
 }
diff --git a/chip/mec1322/lpc.c b/chip/mec1322/lpc.c
index 52ed7d5a58..5f4d1f43a6 100644
--- a/chip/mec1322/lpc.c
+++ b/chip/mec1322/lpc.c
@@ -263,6 +263,15 @@ DECLARE_HOOK(HOOK_CHIPSET_STARTUP, setup_lpc, HOOK_PRIO_FIRST);
 
 static void lpc_resume(void)
 {
+#ifdef CONFIG_POWER_S0IX
+	if (chipset_in_state(CHIPSET_STATE_SUSPEND | CHIPSET_STATE_ON))
+#endif
+	{
+		/* Mask all host events until the host unmasks them itself.  */
+		lpc_set_host_event_mask(LPC_HOST_EVENT_SMI, 0);
+		lpc_set_host_event_mask(LPC_HOST_EVENT_SCI, 0);
+		lpc_set_host_event_mask(LPC_HOST_EVENT_WAKE, 0);
+	}
 	/* Store port 80 event so we know where resume happened */
 	port_80_write(PORT_80_EVENT_RESUME);
 }
diff --git a/chip/npcx/lpc.c b/chip/npcx/lpc.c
index c6607b3472..2606f3fe27 100644
--- a/chip/npcx/lpc.c
+++ b/chip/npcx/lpc.c
@@ -1049,6 +1049,16 @@ DECLARE_HOOK(HOOK_INIT, lpc_init, HOOK_PRIO_INIT_LPC);
 
 static void lpc_resume(void)
 {
+#ifdef CONFIG_POWER_S0IX
+	if (chipset_in_state(CHIPSET_STATE_SUSPEND | CHIPSET_STATE_ON))
+#endif
+	{
+		/* Mask all host events until the host unmasks them itself.  */
+		lpc_set_host_event_mask(LPC_HOST_EVENT_SMI, 0);
+		lpc_set_host_event_mask(LPC_HOST_EVENT_SCI, 0);
+		lpc_set_host_event_mask(LPC_HOST_EVENT_WAKE, 0);
+	}
+
 	/* Store port 80 event so we know where resume happened */
 	port_80_write(PORT_80_EVENT_RESUME);
 }
diff --git a/common/host_event_commands.c b/common/host_event_commands.c
index 8a67822bf7..917ce78e03 100644
--- a/common/host_event_commands.c
+++ b/common/host_event_commands.c
@@ -156,13 +156,6 @@ void lpc_init_mask(void)
 			lpc_override_always_report_mask();
 }
 
-void lpc_s3_resume_clear_masks(void)
-{
-	lpc_set_host_event_mask(LPC_HOST_EVENT_SMI, 0);
-	lpc_set_host_event_mask(LPC_HOST_EVENT_SCI, 0);
-	lpc_set_host_event_mask(LPC_HOST_EVENT_WAKE, 0);
-}
-
 #endif
 
 /*
diff --git a/include/lpc.h b/include/lpc.h
index 7b9a7d7012..05b8d660e3 100644
--- a/include/lpc.h
+++ b/include/lpc.h
@@ -152,10 +152,4 @@ uint32_t lpc_override_always_report_mask(void);
 /* Initialize LPC masks. */
 void lpc_init_mask(void);
 
-/*
- * Clear LPC masks for SMI, SCI and wake upon resume from S3. This is done to
- * mask these events until host unmasks them itself.
- */
-void lpc_s3_resume_clear_masks(void);
-
 #endif  /* __CROS_EC_LPC_H */
diff --git a/power/intel_x86.c b/power/intel_x86.c
index e2b2e42303..db3df2469f 100644
--- a/power/intel_x86.c
+++ b/power/intel_x86.c
@@ -346,8 +346,6 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state)
 		/* Enable wireless */
 		wireless_set_state(WIRELESS_ON);
 
-		lpc_s3_resume_clear_masks();
-
 		/* Call hooks now that rails are up */
 		hook_notify(HOOK_CHIPSET_RESUME);