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authorFurquan Shaikh <furquan@chromium.org>2017-10-30 18:30:03 -0700
committerChromeOS Commit Bot <chromeos-commit-bot@chromium.org>2018-04-16 09:20:30 +0000
commitdbbb19c051be37ef8b1d8aed0674fb5dfd73345b (patch)
treeb9989cc8d696015c2b3f3c4234c691a7e048d0df
parent61cb81aed63dec095af4a7590bcfa23b7bd8c89d (diff)
downloadchrome-ec-dbbb19c051be37ef8b1d8aed0674fb5dfd73345b.tar.gz
lpc: Add and use lpc_resume_clear_masks
Add a new LPC helper routine lpc_resume_clear_masks that can be used to clear SCI, SMI and wake masks upon resume from S3. This is done to mask the events until host explicitly unmasks them. It also ensures that these masks do not get reset on resume from S0ix where the host does not re-configure these masks. BUG=b:68669668 BRANCH=None TEST=Verified following: 1. make -j buildall 2. On resume from S0ix, SCI mask is not reset. 3. On resume from S3, SCI mask is reset and then set again by host request. Change-Id: I32db77d81e2ddf046edb1ef74852c5ac50075b8f Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/745533 Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit 7d66541b462a5b86ab051ce1a4ad5404496a991c) Reviewed-on: https://chromium-review.googlesource.com/989866 Reviewed-by: Joel Kitching <kitching@chromium.org> Commit-Queue: Joel Kitching <kitching@chromium.org> Tested-by: Joel Kitching <kitching@chromium.org> Trybot-Ready: Joel Kitching <kitching@chromium.org>
-rw-r--r--chip/it83xx/lpc.c10
-rw-r--r--chip/lm4/lpc.c5
-rw-r--r--chip/mec1322/lpc.c9
-rw-r--r--chip/npcx/lpc.c10
-rw-r--r--common/host_event_commands.c7
-rw-r--r--include/lpc.h6
-rw-r--r--power/intel_x86.c2
7 files changed, 15 insertions, 34 deletions
diff --git a/chip/it83xx/lpc.c b/chip/it83xx/lpc.c
index 71ce9fa16b..c860a372b9 100644
--- a/chip/it83xx/lpc.c
+++ b/chip/it83xx/lpc.c
@@ -720,16 +720,6 @@ void lpc_disable_acpi_interrupts(void)
static void lpc_resume(void)
{
-#ifdef CONFIG_POWER_S0IX
- if (chipset_in_state(CHIPSET_STATE_SUSPEND | CHIPSET_STATE_ON))
-#endif
- {
- /* Mask all host events until the host unmasks them itself. */
- lpc_set_host_event_mask(LPC_HOST_EVENT_SMI, 0);
- lpc_set_host_event_mask(LPC_HOST_EVENT_SCI, 0);
- lpc_set_host_event_mask(LPC_HOST_EVENT_WAKE, 0);
- }
-
/* Store port 80 event so we know where resume happened */
port_80_write(PORT_80_EVENT_RESUME);
}
diff --git a/chip/lm4/lpc.c b/chip/lm4/lpc.c
index c374fb686e..91c4959862 100644
--- a/chip/lm4/lpc.c
+++ b/chip/lm4/lpc.c
@@ -803,11 +803,6 @@ DECLARE_HOOK(HOOK_INIT, lpc_init, HOOK_PRIO_INIT_LPC);
static void lpc_resume(void)
{
- /* Mask all host events until the host unmasks them itself. */
- lpc_set_host_event_mask(LPC_HOST_EVENT_SMI, 0);
- lpc_set_host_event_mask(LPC_HOST_EVENT_SCI, 0);
- lpc_set_host_event_mask(LPC_HOST_EVENT_WAKE, 0);
-
/* Store port 80 event so we know where resume happened */
port_80_write(PORT_80_EVENT_RESUME);
}
diff --git a/chip/mec1322/lpc.c b/chip/mec1322/lpc.c
index 5f4d1f43a6..52ed7d5a58 100644
--- a/chip/mec1322/lpc.c
+++ b/chip/mec1322/lpc.c
@@ -263,15 +263,6 @@ DECLARE_HOOK(HOOK_CHIPSET_STARTUP, setup_lpc, HOOK_PRIO_FIRST);
static void lpc_resume(void)
{
-#ifdef CONFIG_POWER_S0IX
- if (chipset_in_state(CHIPSET_STATE_SUSPEND | CHIPSET_STATE_ON))
-#endif
- {
- /* Mask all host events until the host unmasks them itself. */
- lpc_set_host_event_mask(LPC_HOST_EVENT_SMI, 0);
- lpc_set_host_event_mask(LPC_HOST_EVENT_SCI, 0);
- lpc_set_host_event_mask(LPC_HOST_EVENT_WAKE, 0);
- }
/* Store port 80 event so we know where resume happened */
port_80_write(PORT_80_EVENT_RESUME);
}
diff --git a/chip/npcx/lpc.c b/chip/npcx/lpc.c
index 2606f3fe27..c6607b3472 100644
--- a/chip/npcx/lpc.c
+++ b/chip/npcx/lpc.c
@@ -1049,16 +1049,6 @@ DECLARE_HOOK(HOOK_INIT, lpc_init, HOOK_PRIO_INIT_LPC);
static void lpc_resume(void)
{
-#ifdef CONFIG_POWER_S0IX
- if (chipset_in_state(CHIPSET_STATE_SUSPEND | CHIPSET_STATE_ON))
-#endif
- {
- /* Mask all host events until the host unmasks them itself. */
- lpc_set_host_event_mask(LPC_HOST_EVENT_SMI, 0);
- lpc_set_host_event_mask(LPC_HOST_EVENT_SCI, 0);
- lpc_set_host_event_mask(LPC_HOST_EVENT_WAKE, 0);
- }
-
/* Store port 80 event so we know where resume happened */
port_80_write(PORT_80_EVENT_RESUME);
}
diff --git a/common/host_event_commands.c b/common/host_event_commands.c
index 917ce78e03..8a67822bf7 100644
--- a/common/host_event_commands.c
+++ b/common/host_event_commands.c
@@ -156,6 +156,13 @@ void lpc_init_mask(void)
lpc_override_always_report_mask();
}
+void lpc_s3_resume_clear_masks(void)
+{
+ lpc_set_host_event_mask(LPC_HOST_EVENT_SMI, 0);
+ lpc_set_host_event_mask(LPC_HOST_EVENT_SCI, 0);
+ lpc_set_host_event_mask(LPC_HOST_EVENT_WAKE, 0);
+}
+
#endif
/*
diff --git a/include/lpc.h b/include/lpc.h
index 05b8d660e3..7b9a7d7012 100644
--- a/include/lpc.h
+++ b/include/lpc.h
@@ -152,4 +152,10 @@ uint32_t lpc_override_always_report_mask(void);
/* Initialize LPC masks. */
void lpc_init_mask(void);
+/*
+ * Clear LPC masks for SMI, SCI and wake upon resume from S3. This is done to
+ * mask these events until host unmasks them itself.
+ */
+void lpc_s3_resume_clear_masks(void);
+
#endif /* __CROS_EC_LPC_H */
diff --git a/power/intel_x86.c b/power/intel_x86.c
index db3df2469f..e2b2e42303 100644
--- a/power/intel_x86.c
+++ b/power/intel_x86.c
@@ -346,6 +346,8 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state)
/* Enable wireless */
wireless_set_state(WIRELESS_ON);
+ lpc_s3_resume_clear_masks();
+
/* Call hooks now that rails are up */
hook_notify(HOOK_CHIPSET_RESUME);