diff options
author | Edward Hill <ecgh@chromium.org> | 2018-02-15 16:10:32 -0700 |
---|---|---|
committer | Daisuke Nojiri <dnojiri@chromium.org> | 2018-02-19 10:33:13 -0800 |
commit | c1d6375682ab272acec33dfd80c9e7e96213b0cd (patch) | |
tree | b274bb86ef293b32a39e11c73107ccfb6ba6b726 | |
parent | ecff599948fba01df364a0cf0d0078d0604c2852 (diff) | |
download | chrome-ec-c1d6375682ab272acec33dfd80c9e7e96213b0cd.tar.gz |
grunt: Add pull-up to EC_BATT_PRES_ODL GPIO
The EC_BATT_PRES_ODL is an open drain signal. The SN74LVC1G07
IC which drives that signal is an open drain buffer. There is
no external pull. Therefore, an internal pullup is required.
BRANCH=none
BUG=b:73286869
TEST=gpioget shows 0 with battery and 1 without
Change-Id: I98e18f54b62ddd558bedd9cec65aa003589a0681
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/923102
Commit-Ready: Jett Rink <jettrink@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r-- | board/grunt/gpio.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/grunt/gpio.inc b/board/grunt/gpio.inc index 76dfca8b3e..3f4ddfde57 100644 --- a/board/grunt/gpio.inc +++ b/board/grunt/gpio.inc @@ -34,7 +34,7 @@ GPIO(PCH_WAKE_L, PIN(7, 4), GPIO_OUT_HIGH) /* Wake SOC */ GPIO(PCH_RCIN_L, PIN(0, 2), GPIO_ODR_HIGH) /* Cold Reset to SOC */ GPIO(CCD_MODE_ODL, PIN(E, 3), GPIO_INPUT) /* Case Closed Debug Mode */ GPIO(ENTERING_RW, PIN(E, 1), GPIO_OUT_LOW) /* EC Entering RW */ -GPIO(EC_BATT_PRES_ODL, PIN(E, 5), GPIO_INPUT) /* Battery Present */ +GPIO(EC_BATT_PRES_ODL, PIN(E, 5), GPIO_INPUT | GPIO_PULL_UP) /* Battery Present */ GPIO(PCH_SYS_PWROK, PIN(D, 6), GPIO_OUT_LOW) /* Power OK to SOC */ GPIO(EC_APU_RST, PIN(E, 4), GPIO_INPUT) /* Reset to SOC */ GPIO(CPU_PROCHOT, PIN(3, 4), GPIO_INPUT | GPIO_SEL_1P8V) /* PROCHOT to SOC */ |