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authorDuncan Laurie <dlaurie@google.com>2018-01-29 08:32:54 -0800
committerDaisuke Nojiri <dnojiri@chromium.org>2018-02-06 18:23:33 -0800
commitf5942dac5a728843796f6aa1fba42f7a9b8e2786 (patch)
treea2a875a2dec4b1a85366080c020321f1d70e7684
parent5634436227411693f8be871e54af25d218c1b8cf (diff)
downloadchrome-ec-f5942dac5a728843796f6aa1fba42f7a9b8e2786.tar.gz
eve: Add support for dumping PMIC fault registers
If during PMIC initialization, it is identified that there was a VR fault, then dump fault registers 0x16 and 0x17 to EC console. This information is very useful during debugging sudden power losses in field and so it is printed out to EC console. Additionally, add panic reason with these register values as panic data so that OS can provide this information in cros ec panicinfo. This helps in retaining the information even if EC console logs overflow. BUG=b:65026806 BRANCH=eve TEST=Verified that on a VCCIO shutdown, PMIC VR fault is reported: "PMIC VRFAULT: PWRSTAT1=0x80 PWRSTAT2=0x00" Change-Id: I583e513f865aeefc7dfc9860ce0ce9789808dea2 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/896163 Reviewed-by: Furquan Shaikh <furquan@chromium.org>
-rw-r--r--board/eve/board.c52
-rw-r--r--board/eve/board.h1
2 files changed, 53 insertions, 0 deletions
diff --git a/board/eve/board.c b/board/eve/board.c
index 243bc3dc21..77de5ef0f5 100644
--- a/board/eve/board.c
+++ b/board/eve/board.c
@@ -346,8 +346,54 @@ const struct temp_sensor_t temp_sensors[] = {
};
BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT);
+/*
+ * Check if PMIC fault registers indicate VR fault. If yes, print out fault
+ * register info to console. Additionally, set panic reason so that the OS can
+ * check for fault register info by looking at offset 0x14(PWRSTAT1) and
+ * 0x15(PWRSTAT2) in cros ec panicinfo.
+ */
+static void board_report_pmic_fault(const char *str)
+{
+ int vrfault, pwrstat1 = 0, pwrstat2 = 0;
+ uint32_t info;
+
+ /* RESETIRQ1 -- Bit 4: VRFAULT */
+ if (i2c_read8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x8, &vrfault)
+ != EC_SUCCESS)
+ return;
+
+ if (!(vrfault & (1 << 4)))
+ return;
+
+ /* VRFAULT has occurred, print VRFAULT status bits. */
+
+ /* PWRSTAT1 */
+ i2c_read8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x16, &pwrstat1);
+
+ /* PWRSTAT2 */
+ i2c_read8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x17, &pwrstat2);
+
+ CPRINTS("PMIC VRFAULT: %s", str);
+ CPRINTS("PMIC VRFAULT: PWRSTAT1=0x%02x PWRSTAT2=0x%02x", pwrstat1,
+ pwrstat2);
+
+ /* Clear all faults -- Write 1 to clear. */
+ i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x8, (1 << 4));
+ i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x16, pwrstat1);
+ i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x17, pwrstat2);
+
+ /*
+ * Status of the fault registers can be checked in the OS by looking at
+ * offset 0x14(PWRSTAT1) and 0x15(PWRSTAT2) in cros ec panicinfo.
+ */
+ info = ((pwrstat2 & 0xFF) << 8) | (pwrstat1 & 0xFF);
+ panic_set_reason(PANIC_SW_PMIC_FAULT, info, 0);
+}
+
static void board_pmic_init(void)
{
+ board_report_pmic_fault("SYSJUMP");
+
if (system_jumped_to_this_image())
return;
@@ -629,6 +675,12 @@ static void board_chipset_resume(void)
}
DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT);
+static void board_chipset_reset(void)
+{
+ board_report_pmic_fault("CHIPSET RESET");
+}
+DECLARE_HOOK(HOOK_CHIPSET_RESET, board_chipset_reset, HOOK_PRIO_DEFAULT);
+
/* Called on lid change */
static void board_lid_change(void)
{
diff --git a/board/eve/board.h b/board/eve/board.h
index 327d7aa273..af33329374 100644
--- a/board/eve/board.h
+++ b/board/eve/board.h
@@ -39,6 +39,7 @@
#define CONFIG_LOW_POWER_IDLE
#define CONFIG_LTO
#define CONFIG_CHIP_PANIC_BACKUP
+#define CONFIG_SOFTWARE_PANIC
#define CONFIG_PWM
#define CONFIG_PWM_KBLIGHT
#define CONFIG_SPI_FLASH_REGS