diff options
| author | bolan.wang <bolan.wang@bitland.com.cn> | 2017-02-14 02:21:59 -0500 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2017-02-15 01:36:44 +0000 |
| commit | 16c84f5c9851bcd0ca69e6b3746691e963713be8 (patch) | |
| tree | 4bc8ff6756e6fa2152d9d7bdc714514178949fd3 | |
| parent | 166b77d26a143f6cf8ed838cf3144be44beb2eb3 (diff) | |
| download | chrome-ec-16c84f5c9851bcd0ca69e6b3746691e963713be8.tar.gz | |
pbody: Add board support for asserting RTCRST
Enable CONFIG_BOARD_HAS_RTC_RESET and add a board_rtc_reset() function
to assert RTCRST to the PCH. It will be called if the board fails to
sequence out of the S5 state.
BUG=none
BRANCH=firmware-glados-7820.B
TEST=manually tested on pbody
Signed-off-by:bolan.wang <bolan.wang@bitland.com.cn>
Change-Id: I6d7740473e446617f1428e0a44414165641d102a
Reviewed-on: https://chromium-review.googlesource.com/442385
Reviewed-by: YH Lin <yueherngl@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@google.com>
Commit-Queue: wang vanillan <bolan.wang@bitland.com.cn>
Tested-by: wang vanillan <bolan.wang@bitland.com.cn>
| -rw-r--r-- | board/pbody/board.c | 8 | ||||
| -rw-r--r-- | board/pbody/board.h | 4 | ||||
| -rw-r--r-- | board/pbody/gpio.inc | 2 |
3 files changed, 13 insertions, 1 deletions
diff --git a/board/pbody/board.c b/board/pbody/board.c index b172f13bcc..3fe4b6ac9b 100644 --- a/board/pbody/board.c +++ b/board/pbody/board.c @@ -178,6 +178,14 @@ void board_reset_pd_mcu(void) gpio_set_level(GPIO_PD_RST_L, 1); } +void board_rtc_reset(void) +{ + CPRINTS("Asserting RTCRST# to PCH"); + gpio_set_level(GPIO_PCH_RTCRST, 1); + udelay(100); + gpio_set_level(GPIO_PCH_RTCRST, 0); +} + const struct temp_sensor_t temp_sensors[] = { {"Battery", TEMP_SENSOR_TYPE_BATTERY, charge_temp_sensor_get_val, 0, 4}, diff --git a/board/pbody/board.h b/board/pbody/board.h index 0f89099681..b659009027 100644 --- a/board/pbody/board.h +++ b/board/pbody/board.h @@ -21,6 +21,7 @@ #define CONFIG_BATTERY_PRESENT_GPIO GPIO_BAT_PRESENT_L #define CONFIG_BATTERY_SMART #define CONFIG_BOARD_VERSION +#define CONFIG_BOARD_HAS_RTC_RESET #define CONFIG_BOARD_POST_GPIO_INIT #define CONFIG_BUTTON_COUNT 2 #define CONFIG_CHARGE_MANAGER @@ -264,6 +265,9 @@ enum sensor_id { /* Reset PD MCU */ void board_reset_pd_mcu(void); +/* Reset RTC */ +void board_rtc_reset(void); + #endif /* !__ASSEMBLER__ */ #endif /* __CROS_EC_BOARD_H */ diff --git a/board/pbody/gpio.inc b/board/pbody/gpio.inc index 06788b18e2..eac8af9816 100644 --- a/board/pbody/gpio.inc +++ b/board/pbody/gpio.inc @@ -111,7 +111,7 @@ GPIO(CHARGE_LED_2, PIN(156), GPIO_OUT_LOW) GPIO(BATLOW_L_PMIC_LDO_EN, PIN(55), GPIO_INPUT) GPIO(PP1800_DX_AUDIO_EN, PIN(141), GPIO_OUT_LOW) -/* NC / stuffing option */ + GPIO(PCH_RTCRST, PIN(163), GPIO_OUT_LOW) GPIO(PMIC_SLP_SUS_L, PIN(201), GPIO_OUT_LOW) GPIO(USB_C1_CHARGE_EN_L, PIN(210), GPIO_OUT_LOW) |