diff options
| author | Vincent Palatin <vpalatin@chromium.org> | 2018-02-16 18:21:28 +0100 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-02-17 03:39:51 -0800 |
| commit | 82fe7e647af0674d81b67ae42320b4da294cb0d2 (patch) | |
| tree | 5e84faacbda1ed4dc9a5f04ae60be20279eefd99 | |
| parent | 3aff8da158e97b42550844eb5cfcbe9f937130d7 (diff) | |
| download | chrome-ec-82fe7e647af0674d81b67ae42320b4da294cb0d2.tar.gz | |
meowth_fp: more reliable flashing sequence
Release the reset of the FP MCU later after loading the proper spidev
kernel module else the STM DFU bootloader is confused by the SPI state
and fails half of the time.
Also update the SPI device for the current board configuration.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:36125319
TEST=On Meowth, run a lot of 'flash_fp_mcu ec.bin'
Change-Id: I634fbc91fc5da52b07c48696594661f88338d986
Reviewed-on: https://chromium-review.googlesource.com/924284
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
| -rwxr-xr-x | board/meowth_fp/flash_fp_mcu | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/board/meowth_fp/flash_fp_mcu b/board/meowth_fp/flash_fp_mcu index 41ffbb9ab0..2887d472a3 100755 --- a/board/meowth_fp/flash_fp_mcu +++ b/board/meowth_fp/flash_fp_mcu @@ -8,7 +8,7 @@ SPIDEV="/dev/spidev1.0" # Cannonlake PCH GPIOs GPIOCHIP="gpiochip268" # GSPI1 ACPI device for FP MCU -SPIID="spi-PRP0001:00" +SPIID="spi-PRP0001:01" # FPMCU RST_ODL is on GPP_A23 = 268 + 23 = 291 GPIO_NRST=291 # FPMCU BOOT0 is on GPP_A21 = 268 + 21 = 289 @@ -39,14 +39,16 @@ echo "out" > /sys/class/gpio/gpio${GPIO_NRST}/direction # Reset sequence to enter bootloader mode echo 1 > /sys/class/gpio/gpio${GPIO_BOOT0}/value echo 0 > /sys/class/gpio/gpio${GPIO_NRST}/value -echo 1 > /sys/class/gpio/gpio${GPIO_NRST}/value - -echo "in" > /sys/class/gpio/gpio${GPIO_NRST}/direction # load spidev (fail on cros-ec-spi first to change modalias) echo "${SPIID}" > /sys/bus/spi/drivers/cros-ec-spi/bind echo "${SPIID}" > /sys/bus/spi/drivers/spidev/bind +# Release reset as the SPI bus is now ready +echo 1 > /sys/class/gpio/gpio${GPIO_NRST}/value + +echo "in" > /sys/class/gpio/gpio${GPIO_NRST}/direction + stm32mon -s ${SPIDEV} -e -w $1 # unload spidev |