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authorJett Rink <jettrink@chromium.org>2018-02-09 08:16:00 -0700
committerchrome-bot <chrome-bot@chromium.org>2018-02-09 16:07:14 -0800
commitff11702c40a7bd88fa64444798c40731a09e4166 (patch)
tree080f16b41510acf9d0274cdfc09496614189ff84
parentc1252e71caec72f53ec4443f7cdbe95d682b3dcc (diff)
downloadchrome-ec-ff11702c40a7bd88fa64444798c40731a09e4166.tar.gz
grunt: Making control of SCI and SMI interrupt pins more clear
BRANCH=none BUG=none TEST=none Change-Id: I82d0a68f192fdc339af8682b99781cb16802ac32 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/911590 Reviewed-by: Edward Hill <ecgh@chromium.org>
-rw-r--r--board/grunt/gpio.inc7
1 files changed, 5 insertions, 2 deletions
diff --git a/board/grunt/gpio.inc b/board/grunt/gpio.inc
index f5e71ea87f..11f3b49dae 100644
--- a/board/grunt/gpio.inc
+++ b/board/grunt/gpio.inc
@@ -61,8 +61,11 @@ GPIO(I2C5_SDA, PIN(3, 6), GPIO_INPUT) /* EC_I2C_EEPROM_SDA and
GPIO(I2C7_SCL, PIN(B, 3), GPIO_INPUT | GPIO_SEL_1P8V) /* EC_I2C_SENSOR_SCL */
GPIO(I2C7_SDA, PIN(B, 2), GPIO_INPUT | GPIO_SEL_1P8V) /* EC_I2C_SENSOR_SDA */
-GPIO(PCH_SCI_ODL, PIN(7, 6), GPIO_ODR_HIGH)
-GPIO(PCH_SMI_ODL, PIN(C, 6), GPIO_ODR_HIGH)
+/*
+ * The NPCX LPC driver configures and controls SCI and SMI,
+ * so PCH_SCI_ODL [PIN(7, 6)] and PCH_SMI_ODL [PIN(C, 6)] are
+ * not defined here as GPIOs.
+ */
GPIO(PCH_SLP_S0_L, PIN(A, 4), GPIO_INPUT)
GPIO(EN_USB_A0_5V, PIN(6, 1), GPIO_OUT_LOW) /* Enable A0 5V Charging */