diff options
author | Parth Malkan <parthmalkan@google.com> | 2022-01-06 15:03:34 -0800 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2022-01-07 02:30:44 +0000 |
commit | 86d03603628e3fed9728a86f9acf06e9de435a5e (patch) | |
tree | be1da2ccf9ca24bffa13335e1047b3a341d6dfc6 | |
parent | ce2d4ba894b21229e38352bcb4450b02fef958a2 (diff) | |
download | chrome-ec-86d03603628e3fed9728a86f9acf06e9de435a5e.tar.gz |
taniks: GPIO setting for KSI
Configure GPIO pins for KSI KB module
BUG=b:213505004
BRANCH=none
TEST=make buildall -j
Signed-off-by: Parth Malkan <parthmalkan@google.com>
Change-Id: I3eb96013c6a5198e03d654c0f38829cafc822181
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3370578
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Arthur Lin <arthur.lin@lcfc.corp-partner.google.com>
-rw-r--r-- | board/taniks/gpio.inc | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/board/taniks/gpio.inc b/board/taniks/gpio.inc index 20b91df22e..9984ebc55e 100644 --- a/board/taniks/gpio.inc +++ b/board/taniks/gpio.inc @@ -97,14 +97,19 @@ ALTERNATE(PIN_MASK(B, 0x80), 0, MODULE_PWM, 0) /* GPIOB7/PWM5 */ /* ADC alternate functions */ ALTERNATE(PIN_MASK(3, 0x10), 0, MODULE_ADC, 0) /* GPIO34/PS2_DAT2/ADC6 */ -ALTERNATE(PIN_MASK(4, 0x34), 0, MODULE_ADC, 0) /* GPIO42/ADC3/RI_L, GPIO45/ADC0, GPIO44/ADC1 */ +ALTERNATE(PIN_MASK(4, 0x24), 0, MODULE_ADC, 0) /* GPIO42/ADC3/RI_L, GPIO45/ADC0 */ ALTERNATE(PIN_MASK(E, 0x02), 0, MODULE_ADC, 0) /* GPIOE1/ADC7 */ /* KB alternate functions */ ALTERNATE(PIN_MASK(0, 0xf0), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO10&P80_CLK/GPIO07, KSO11&P80_DAT/GPIO06, KSO12/GPIO05, KSO13/GPIO04 */ ALTERNATE(PIN_MASK(1, 0x7f), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO06/GPO13/GP_SEL_L, KSO07/GPO12/JEN_L, KSO03/GPIO16/JTAG_TDO0_SWO, KSO04/GPIO15/XNOR, KSO05/GPIO14, KSO08/GPIO11/CR_SOUT1, KSO09/GPIO10/CR_SIN1 */ ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO00/GPIO21/JTAG_TCK_SWCLK, KSO01/GPIO20/JTAG_TMS_SWIO */ +ALTERNATE(PIN_MASK(3, 0x80), 0, MODULE_KB, GPIO_INPUT | GPIO_PULL_UP) /* GPIO37/PS2_CLK2/ADC5 */ +ALTERNATE(PIN_MASK(4, 0x1a), 0, MODULE_KB, GPIO_INPUT | GPIO_PULL_UP) /* GPIO44/ADC1, GPIO43/ADC2, GPIO41/ADC4 */ ALTERNATE(PIN_MASK(8, 0x04), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO14/GPIO82 */ +ALTERNATE(PIN_MASK(C, 0x80), 0, MODULE_KB, GPIO_INPUT | GPIO_PULL_UP) /* GPIOC7/DTR_L_BOUT/ADC11 */ +ALTERNATE(PIN_MASK(E, 0x01), 0, MODULE_KB, GPIO_INPUT | GPIO_PULL_UP) /* GPIOE0/ADC10 */ +ALTERNATE(PIN_MASK(F, 0x03), 0, MODULE_KB, GPIO_INPUT | GPIO_PULL_UP) /* GPIOF1/ADC8, GPIOF0/ADC9 */ /* PMU alternate functions */ ALTERNATE(PIN_MASK(0, 0x01), 0, MODULE_PMU, GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) /* PSL_IN2_L&GPI00/GPIO00 */ |