diff options
author | Randall Spangler <rspangler@chromium.org> | 2012-12-06 15:46:28 -0800 |
---|---|---|
committer | Randall Spangler <rspangler@chromium.org> | 2012-12-06 18:04:36 -0800 |
commit | 60fb4a13b52f4ffae0bb981feddce7db207558ce (patch) | |
tree | ef984cd92a543078d9da9b817a0d05c3a8f2b1f1 | |
parent | 39b9ddb421a886251fd0454c769cf462fecf7c89 (diff) | |
download | chrome-ec-60fb4a13b52f4ffae0bb981feddce7db207558ce.tar.gz |
Increase cold reset hibernate time to 200ms
The hardware fix for issue 16600 adds RC delays to ENABLE_5VALW, so
that +5VALW stays on during a warm reset of the EC. In the worst
case, +5VALW will drop around 150ms, which could then move the +3VALW
glitch right into the time frame where the EC is booting following
hibernate.
Increase the cold reset hibernate time from 150ms to 200ms. This
ensures that +5VALW has dropped before the EC comes out of hibernate.
BUG=chrome-os-partner:16600
BRANCH=link
TEST=manual
From the EC console, 'reboot cold' a bunch of times. The system
shouldn't hang. (Alternately, you can 'ectool reboot_ec cold' a bunch
of times)
Original-Change-Id: I4bebdb552b8e917c6345badd6efb68b10d7d1f86
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/39340
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
(cherry picked from commit c26a242e947a110ea3cf0c43d8274eebb9aaeb5a)
Change-Id: Ifc0edac446e4d3498f3ed400e035e8fe3e01c227
Reviewed-on: https://gerrit.chromium.org/gerrit/39355
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Randall Spangler <rspangler@chromium.org>
-rw-r--r-- | chip/lm4/system.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/chip/lm4/system.c b/chip/lm4/system.c index bc650a3a93..ff4722f03a 100644 --- a/chip/lm4/system.c +++ b/chip/lm4/system.c @@ -35,9 +35,9 @@ enum hibdata_index { /* * Time to hibernate to trigger a power-on reset. 50 ms is sufficient for the * EC itself, but we need a longer delay to ensure the rest of the components - * on the same power rail are reset. + * on the same power rail are reset and 5VALW has dropped. */ -#define HIB_RESET_USEC 150000 +#define HIB_RESET_USEC 200000 static int wait_for_hibctl_wc(void) { |