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authorRyan Zhang <Ryan.Zhang@quantatw.com>2015-11-30 10:39:29 +0800
committerchrome-bot <chrome-bot@chromium.org>2015-11-30 14:30:24 -0800
commit1051a7e2d56ed23634f33a380236f370d70370c0 (patch)
tree37a7b0ad476854a5e28b7de458fc0b3bfc3c94cc
parent29467c60c6861b38229a4c851912d0867068f128 (diff)
downloadchrome-ec-1051a7e2d56ed23634f33a380236f370d70370c0.tar.gz
Lars: update for proto board
Following kunimitsu settings of https://chromium-review.googlesource.com/#/c/312559/ BUG=None BRANCH=lars TEST=`make BOARD=lars -j` Change-Id: If226f5b8a46cfb8ffb19015a0a7cc684d1b61175 Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/314643 Reviewed-by: Shawn N <shawnn@chromium.org>
-rw-r--r--board/lars/board.c1
-rw-r--r--board/lars/board.h13
-rw-r--r--board/lars/gpio.inc6
3 files changed, 8 insertions, 12 deletions
diff --git a/board/lars/board.c b/board/lars/board.c
index c35fe5cdae..90c3ae5586 100644
--- a/board/lars/board.c
+++ b/board/lars/board.c
@@ -44,7 +44,6 @@
#define GPIO_KB_INPUT (GPIO_INPUT | GPIO_PULL_UP)
#define GPIO_KB_OUTPUT (GPIO_ODR_HIGH)
-#define GPIO_KB_OUTPUT_COL2 (GPIO_OUT_LOW)
#define TPS650830_I2C_ADDR TPS650830_I2C_ADDR1
diff --git a/board/lars/board.h b/board/lars/board.h
index 26002d50f3..d338fe0463 100644
--- a/board/lars/board.h
+++ b/board/lars/board.h
@@ -27,8 +27,8 @@
#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 1
#define CONFIG_CHARGER_NARROW_VDC
#define CONFIG_TRICKLE_CHARGING
-/* PSYS register 8.25KOhm */
-#define CHARGER_PSYS_REGISTER 8250
+/* PSYS resistor 8.25KOhm */
+#define CHARGER_PSYS_RESISTOR 8250
#define CONFIG_FANS 1
#define CONFIG_CHARGER_PSYS
@@ -36,10 +36,10 @@
#define CONFIG_CHARGER_SENSE_RESISTOR_AC 20
/*
- * PSYS gain = 1 / (PYSY register * (1.44 or 0.36) uA/W)
+ * PSYS gain = 1 / (PYSY resistor * (1.44 or 0.36) uA/W)
*/
-#define ISL9237_C2_PSYS_GAIN_1_44 (100000000ul / (CHARGER_PSYS_REGISTER * 144))
-#define ISL9237_C2_PSYS_GAIN_0_36 (100000000ul / (CHARGER_PSYS_REGISTER * 36))
+#define ISL9237_C2_PSYS_GAIN_1_44 (100000000ul / (CHARGER_PSYS_RESISTOR * 144))
+#define ISL9237_C2_PSYS_GAIN_0_36 (100000000ul / (CHARGER_PSYS_RESISTOR * 36))
#define CONFIG_CHIPSET_SKYLAKE
#define CONFIG_CLOCK_CRYSTAL
@@ -49,9 +49,6 @@
#define CONFIG_HOSTCMD_PD
#define CONFIG_I2C
#define CONFIG_I2C_MASTER
-#define CONFIG_KEYBOARD_COL2_INVERTED
-#undef CONFIG_KEYBOARD_KSO_BASE
-#define CONFIG_KEYBOARD_KSO_BASE 0 /* KSO starts from KSO04 */
#define CONFIG_KEYBOARD_PROTOCOL_8042
#define CONFIG_LED_COMMON
#define CONFIG_LID_SWITCH
diff --git a/board/lars/gpio.inc b/board/lars/gpio.inc
index 5f3d1c3405..4813507129 100644
--- a/board/lars/gpio.inc
+++ b/board/lars/gpio.inc
@@ -28,11 +28,11 @@ GPIO_INT(PCH_SLP_S3_L, PIN(206), GPIO_INT_BOTH | GPIO_PULL_UP, power_signal_int
GPIO_INT(USB_C0_BC12_INT_L, PIN(124), GPIO_INT_FALLING, usb0_evt)
GPIO_INT(PD_MCU_INT, PIN(122), GPIO_INT_FALLING, pd_mcu_interrupt)
-GPIO(KBD_KSO2, PIN(101), GPIO_KB_OUTPUT_COL2) /* KB pins */
GPIO(BOARD_VERSION1, PIN(6), GPIO_INPUT)
GPIO(BOARD_VERSION2, PIN(7), GPIO_INPUT)
GPIO(BOARD_VERSION3, PIN(10), GPIO_INPUT)
-GPIO(NC_011, PIN(11), GPIO_INPUT | GPIO_PULL_UP)
+/* Reserved for USB-A ILIM */
+GPIO(USB_ILIM_SEL, PIN(11), GPIO_INPUT | GPIO_PULL_UP)
GPIO(PCH_SMI_L, PIN(44), GPIO_ODR_HIGH)
GPIO(PCH_SCI_L, PIN(26), GPIO_ODR_HIGH)
GPIO(SYS_RESET_L, PIN(121), GPIO_ODR_HIGH)
@@ -116,7 +116,7 @@ ALTERNATE(PIN_MASK(12, 0x01), 1, MODULE_LPC, 0)
ALTERNATE(PIN_MASK(0, 0x3f), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)
/* KB ROW - GPIO100-GPIO104, GPIO106-GPIO107 */
/* NOTE - GP101 should be configured as GPIO */
-ALTERNATE(PIN_MASK(10, 0xdd), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)
+ALTERNATE(PIN_MASK(10, 0xdf), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)
/* KB COL - GPIO032 */
ALTERNATE(PIN_MASK(3, 0x04), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
/* KB COL - GPIO040, GPIO042-GPIO043 */