diff options
| author | Vic (Chun-Ju) Yang <victoryang@chromium.org> | 2014-04-28 15:02:16 +0800 |
|---|---|---|
| committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2014-04-30 09:49:05 +0000 |
| commit | a0d6ac7166d96819d6aa90562c295c2f9d943ded (patch) | |
| tree | 85a983f06ea595c6466e41e69001ea9f9024e83e | |
| parent | 1b7573c3e9484b35ee62c1160719076e8e9d8837 (diff) | |
| download | chrome-ec-a0d6ac7166d96819d6aa90562c295c2f9d943ded.tar.gz | |
Keyborg: Refine master slave identification
The current identification method uses SPI_NSS as master/slave
indication. However, if the other chip is not reset at the same time, it
would drive SPI_NSS and fails the identification.
Since the master chip is equipped with USB connection, we can identify
the chips with USB pull up pin, which doesn't suffer from this problem.
Also updates the comments on pin usage.
BUG=None
TEST=Reset the chips repeatedly.
BRANCH=None
Change-Id: Iccd7e73fca85abfa554f90dcb7e354cc4cc04626
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/197194
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
| -rw-r--r-- | board/keyborg/hardware.c | 12 | ||||
| -rw-r--r-- | board/keyborg/master_slave.c | 25 |
2 files changed, 29 insertions, 8 deletions
diff --git a/board/keyborg/hardware.c b/board/keyborg/hardware.c index 6651cf5b46..c8c106f92b 100644 --- a/board/keyborg/hardware.c +++ b/board/keyborg/hardware.c @@ -66,21 +66,23 @@ static void pins_init(void) STM32_GPIO_AFIO_MAPR = (STM32_GPIO_AFIO_MAPR & ~(0x7 << 24)) | (2 << 24); - /* Pin usage: + /* + * Initial pin usage: * PA0: SPI_NSS - INPUT/INT_FALLING - * PA1: N_CHG - OUTPUT/LOW + * PA1: N_CHG - INPUT * PA3: SPI_CLK - INPUT * PA4: SPI_MISO - INPUT * PA6: CS1 - OUTPUT/HIGH * PA7: SPI_MOSI - INPUT + * PA9: USB_PU - OUTPUT/LOW * PA15: UART TX - OUTPUT/HIGH * PI1: SYNC1 - OUTPUT/LOW * PI2: SYNC2 - OUTPUT/LOW */ - STM32_GPIO_CRL(GPIO_A) = FLOAT(0) | OUT(1) | FLOAT(3) | FLOAT(4) | + STM32_GPIO_CRL(GPIO_A) = FLOAT(0) | FLOAT(1) | FLOAT(3) | FLOAT(4) | OUT(6) | FLOAT(7); - STM32_GPIO_CRH(GPIO_A) = OUT(15); - STM32_GPIO_BSRR(GPIO_A) = LOW(1) | HIGH(6) | HIGH(15); + STM32_GPIO_CRH(GPIO_A) = OUT(9) | OUT(15); + STM32_GPIO_BSRR(GPIO_A) = LOW(1) | HIGH(6) | LOW(9) | HIGH(15); STM32_EXTI_FTSR |= INT(0); STM32_GPIO_CRL(GPIO_I) = OUT(1) | OUT(2); diff --git a/board/keyborg/master_slave.c b/board/keyborg/master_slave.c index 39f41ddddb..eab62b1b73 100644 --- a/board/keyborg/master_slave.c +++ b/board/keyborg/master_slave.c @@ -54,7 +54,7 @@ static int master_handshake(void) uint32_t val; int err; - /* SYNC2 -> GPIO_INPUT */ + /* SYNC2 is the sync signal from the slave. Set it to input. */ val = STM32_GPIO_CRL(GPIO_I); val &= ~0x00000f00; val |= 0x00000400; @@ -72,7 +72,17 @@ static int slave_handshake(void) uint32_t val; int err; - /* SYNC1 -> GPIO_INPUT */ + /* + * N_CHG is used to drive SPI_NSS on the master. Set it to + * output low. + */ + val = STM32_GPIO_CRL(GPIO_A); + val &= ~0x000000f0; + val |= 0x00000010; + STM32_GPIO_CRL(GPIO_A) = val; + STM32_GPIO_BSRR(GPIO_A) = 1 << (1 + 16); + + /* SYNC1 is the sync signal from the master. Set it to input. */ val = STM32_GPIO_CRL(GPIO_I); val &= ~0x000000f0; val |= 0x00000040; @@ -87,7 +97,16 @@ static int slave_handshake(void) static void master_slave_check(void) { - if (STM32_GPIO_IDR(GPIO_A) & (1 << 0) /* NSS */) { + /* + * Master slave identity check: + * - Master has USB_PU connected to N_CHG through 1.5K + * resistor. USB_PU is initially low, so N_CHG is low. + * - Slave has N_CHG connected to master NSS with a 20K + * pull-up. Master NSS is initially Hi-Z, so N_CHG is + * high. + */ + + if (STM32_GPIO_IDR(GPIO_A) & (1 << 1) /* N_CHG */) { debug_printf("I'm slave\n"); is_master = 0; } else { |