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authoryoojin <yoojin7.lee@samsung.com>2014-08-04 18:43:49 +0900
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2014-08-05 01:35:05 +0000
commit509d1e7f6248316edc347cbf07fa6f55ab499629 (patch)
tree12b85cf9bb456b346603806924b389886210cd13
parent3b162523949d29d44e020daa7f613df533b9abce (diff)
downloadchrome-ec-509d1e7f6248316edc347cbf07fa6f55ab499629.tar.gz
Winky : Change power sequence for RSMRST# on BYT-M
RSMRST# has to come 10us after the P1.0V is stable. Before, RSMRST# was high before P1.0V_AUX and P1.8V_AUX high. So, 1.1ms Delay was added on EC code. On this, RSMRST# is high after all SUS_Rails up. (P3.3V_AUX, P1.0V_AUX and P1.8V_AUX) BUG=chrome-os-partner:31116 TEST=emerge-winky chromeos-ec Measure signal waveforms in power up sequence. Change-Id: I55af36a6f4f2e7ea44ddf6b576df54f55cd3c8b0 Reviewed-on: https://chromium-review.googlesource.com/210954 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: YongBeum Ha <ybha@samsung.com> Tested-by: YongBeum Ha <ybha@samsung.com> Commit-Queue: YongBeum Ha <ybha@samsung.com>
-rwxr-xr-xpower/baytrail.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/power/baytrail.c b/power/baytrail.c
index 921b642f3d..16764dd803 100755
--- a/power/baytrail.c
+++ b/power/baytrail.c
@@ -199,6 +199,7 @@ enum power_state power_handle_state(enum power_state state)
return POWER_G3;
}
+ usleep(1100);
/* Deassert RSMRST# */
gpio_set_level(GPIO_PCH_RSMRST_L, 1);